24
Datasheet
Electrical Specifications
2.9
Asynchronous GTL+ Signals
The Intel Xeon processor MP on the 0.13 micron process processor does not utilize CMOS voltage
levels on any signals that connect to the processor silicon. As a result, legacy input signals such as
A20M#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, SMI#, SLP#, and STPCLK# utilize GTL+
input buffers. Legacy output FERR#/PBE# and other non-AGTL+ signals IERR#, THERMTRIP#
and PROCHOT# utilize GTL+ output buffers. All of these asynchronous GTL+ signals follow the
same DC requirements as AGTL+ signals, however the outputs are not driven high (during the
logical 0-to-1 transition) by the processor (the major difference between GTL+ and AGTL+).
Asynchronous GTL+ signals do not have setup or hold time specifications in relation to
BCLK[1:0]. However, all of the asynchronous GTL+ signals are required to be asserted for at least
two BCLKs in order for the processor to recognize them. See
Table 11 and
Table 18 for the DC
and AC specifications for the asynchronous GTL+ signal groups.
SMBus signals are derived from components mounted on the processor interposer along with the
processor silicon. The required SM_VCC for these signals is 3.3 V. See
Section 6.4 for further
details.
2.10
Maximum Ratings
Table 6 lists the processor’s maximum environmental stress ratings. Functional operation at the
absolute maximum and minimum is neither implied nor guaranteed. The processor should not
receive a clock while subjected to these conditions. Functional operating parameters are listed in
the AC and DC tables. Extended exposure to the maximum ratings may affect device reliability.
Furthermore, although the processor contains protective circuitry to resist damage from static
electric discharge, one should always take precautions to avoid high static voltages or electric
fields.
NOTES:
1. This rating applies to any pin of the processor.
2. Contact Intel for storage requirements in excess of one year.
Table 6. Processor Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Unit
Notes
TSTORAGE Processor storage temperature
–40
85
°C
2
VCC
Any processor supply voltage with
respect to VSS
–0.3
1.75
V
1
VinAGTL+
AGTL+ buffer DC input voltage with
respect to VSS
–0.1
1.75
V
VinGTL+
Async GTL+ buffer DC input voltage
with respect to Vss
-0.1
1.75
V
VinSMBus
SMBus buffer DC input voltage with
respect to Vss
-0.3
6.0
V
IVID
Max VID pin current
5
mA