Intel
82865G/82865GV GMCH Datasheet
143
System Address Map
4.3
Extended Memory Area
This memory area covers the 1 MB to 4 GB–1 (100000h–FFFFFFFFh) address range and is
divided into the following regions:
Main system SDRAM memory from 1 MB to the Top of Memory; maximum of 4-GB
SDRAM.
AGP or PCI Memory space from the Top of Memory to 4 GB, with two specific ranges:
— APIC Configuration Space from FEC0_0000h (4 GB–20 MB) to FECF_FFFFh and
FEE0
_
0000h to FEEF
_
FFFFh
— High BIOS area from 4 GB to 4 GB – 2 MB
Main System Memory Address Range (0010_0000h to Top of Main Memory)
The address range from 1 MB to the top of system memory is mapped to system memory address
range controlled by the GMCH. The Top of Main Memory (TOMM) is limited to 4-GB SDRAM.
All accesses to addresses within this range will be forwarded by the GMCH to system memory
unless a hole in this range is created using the fixed hole as controlled by the FDHC register.
Accesses within this hole are forwarded to the hub interface.
The GMCH provides a maximum system memory address decode space of 4 GB. The GMCH does
not remap APIC memory space. The GMCH does not limit system memory address space in
hardware.
4.3.1
15 MB–16 MB Window
A hole can be created at 15 MB–16 MB as controlled by the fixed hole enable (FDHC register) in
Device 0 space. Accesses within this hole are forwarded to the hub interface. The range of physical
SDRAM memory disabled by opening the hole is not remapped to the Top of the memory – that
physical SDRAM space is not accessible. This 15-MB–16-MB hole is an optionally enabled ISA
hole. Video accelerators originally used this hole. There is no inherent BIOS request for the
15-MB–16-MB hole.