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Intel
82865G/82865GV GMCH Datasheet
Intel
82865GV GMCH
9.1
No AGP Interface
The 82865GV does not have an AGP interface. References to AGP or AGP/PCI_B in this
document only apply to the 82865G component. For example, Chapter 2 describes how the
82865G DVO signals are multiplexed with the AGP signals. For the 82865GV, the DVO signals
are
not
multiplexed. In addition, AGP related registers are
not
in the 82865GV component.
9.2
Intel
82865G /
82865GV Signal Differences
The 82865G and 82865GV signals are the same, except for the following:
ADD_DETECT signal functionality is slightly different between the two components.
There are no AGP signals on the 82865GV. The 82865GV DVO signals are not multiplexed.
Section 2.5.7,
Intel
DVO Signals Name to AGP Signal Name Pin Mapping
does not apply to the
82865GV.
In
Section 2.5.5
, replace the ADD_DETECT signal description with the following:
9.2.1
Functional Straps
In
Section 2.11.1,
Functional Straps
,
replace the PSBSEL signal description with the following:
Signal Name
Type
Description
GPAR/
ADD_DETECT
I/O AGP
PAR:
Same as PCI. Not used on AGP transactions but used during PCI
transactions as defined by the
PCI Local Bus Specification, Revision 2.1.
ADD_DETECT:
This signal acts as a strap and indicates whether the interface is
in DVO mode. The 82865GV GMCH has an internal pull-up on this signal that
will naturally pull it high. If an Intel
DVO is used, the signal should be pulled low
and the DVO select bit in the GMCHCFG register will be set to DVO mode.
Motherboards that use this interface in a DVO down scenario should have a
pull-down resistor on ADD_DETECT.
Signal Name
Type
Description
GPAR/
ADD_DETECT
DVO
Operating Mode Select Strap:
This strap selects the operating mode of the Intel
DVO signals
0 (low voltage) = ADD Card (2X DVO)
1 (high voltage) = Reserved
The ADD_DETECT strap is flow-through while RSTIN# is asserted and latched on
the deasserting edge of RSTIN#. RSTIN# is used to make sure that the card is not
driving the GPAR/ADD_DETECT signal when it is latched.