Intel
82865G/82865GV GMCH Datasheet
71
Register Description
For details on overall system address mapping scheme see
Chapter 4
.
DOS Application Area (00000h–9FFFh)
The DOS area is 640 KB in size, and it is further divided into two parts. The 512-KB area at 0 to
7FFFFh is always mapped to the main memory controlled by the GMCH, while the 128-KB
address range from 080000 to 09FFFFh can be mapped to PCI_A or to main memory. By default
this range is mapped to main memory and can be declared as a main memory hole (accesses
forwarded to PCI_A) via the GMCH’s FDHC configuration register.
Video Buffer Area (A0000h–BFFFFh)
Attribute bits do not control this 128-KB area. The host-initiated cycles in this region are always
forwarded to either PCI_A or AGP unless this range is accessed in SMM mode.
Routing of
accesses is controlled by the Legacy VGA control mechanism of the virtual PCI-to-PCI
bridge device in the GMCH.
This area can be programmed as SMM area via the SMRAM register. When used as a SMM space,
this range cannot be accessed from the HI or AGP.
Expansion Area (C0000h–DFFFFh)
This 128 KB area is divided into eight, 16-KB segments, which can be assigned with different
attributes via PAM control register as defined by
Table 7
.
Extended System BIOS Area (E0000h–EFFFFh)
This 64-KB area is divided into four 16-KB segments that can be assigned with different attributes
via the PAM Control register as defined by
Table 7
.
System BIOS Area (F0000h–FFFFFh)
This area is a single 64-KB segment that can be assigned with different attributes via PAM control
register as defined by
Table 7
.
3.5.19
FDHC—Fixed Memory(ISA) Hole Control Register
(Device 0)
Address Offset:
Default Value:
Access:
Size:
97h
00h
R/W, RO
8 bits
This 8-bit register controls a fixed SDRAM hole from 15–16 MB.
Bit
Descriptions
7
Hole Enable (HEN)—R/W.
This field enables a memory hole in SDRAM space. The SDRAM
that lies “behind” this space is not remapped.
0 =Disable. No memory hole.
1 =Enable. Memory hole from 15 MB to 16 MB.
6:0
Reserved.