52
Intel
82865G/82865GV GMCH Datasheet
Register Description
If the Bus Number is non-zero, greater than the value programmed into the Secondary Bus Number
register, and less than or equal to the value programmed into the Subordinate Bus Number register,
the configuration cycle is targeting a PCI bus downstream of the targeted interface. The GMCH
generates a Type 1 PCI configuration cycle on PCI_B/AGP. The address bits are mapped as shown
in
Figure 7
.
To prepare for mapping of the configuration cycles on AGP/PCI_B, initialization software goes
through the following sequence:
1. Scans all devices residing on the PCI Bus 0 using Type 0 configuration accesses.
2. For every device residing at bus 0 that implements PCI-PCI bridge functionality, it will
configure the secondary bus of the bridge with the appropriate number and scan further down
the hierarchy. This process includes the configuration of the virtual PCI-to-PCI bridges within
the GMCH used to map the AGP device’s address spaces in a software specific manner.
Note:
Although initial AGP platform implementations will not support hierarchical buses residing below
AGP, this specification still must define this capability to support PCI-66 compatibility. Note also
that future implementations of the AGP devices may support hierarchical PCI or AGP-like buses
coming out of the root AGP device.
3.4
I/O Mapped Registers
The GMCH contains two registers that reside in the processor I/O address space: the Configuration
Address (CONFIG_ADDRESS) register and the Configuration Data (CONFIG_DATA) register.
The Configuration Address register enables/disables the configuration space and determines what
portion of configuration space is visible through the Configuration Data window.
Figure 7. Configuration Mechanism Type 1 Configuration
Address-to-PCI Address Mapping
Reg. Index
Reg. Index
Device
Number
Function Number
Bus
Number
Reserve
d
1
Function Number
Device
Number
Bus
Number
0
CONFIG_ADDRESS
31
16 15
8 7
0
1
2
1110
23
24
16 15
11
7
0
2 1
8
10
23
31 30
24
0 1
X X
PCI Address
AD[31:0]