Intel
82865G/82865GV GMCH Datasheet
161
Functional Description
down controlling logic on the AGP I/O buffers, selecting the weak pull-up on GPAR. On the
assertion of PWROK, a 0 is detected on the GPAR pin and is latched into the GMCHCFG.3 strap
bit to select DVO over AGP. At the assertion of PWROK, the AGP 3.0 detect signal (value 0) is
also latched into the AGPSTAT.3 strap bit. Note that a 0 in AGP 3.0 detect is meaningless when
DVO is selected.
An AGP 2.0 card tri-states GPAR and leaves the GC_DET# pin unconnected. GVREF = 0.75 V
and GPAR is weakly pulled high during assertion of PWROK; a 1 is latched into GMCHCFG.3
strap bit to select AGP. AGP 3.0 detect value latched on the assertion of PWROK = 0 indicating
AGP 2.0 mode.
An AGP 3.0 card terminates GPAR low, and pulls GC_DET# low, causing the VREF generator to
drive 0.35 V to GVREF. Note that during the assertion of PWROK, GPAR = 0 and
AGP 3.0 detect = 1. To work correctly when AGP 3.0 detect = 1, AGP must be selected over DVO
(i.e., when AGP 3.0 detect = 1, AGP/DVO# strap value must also be 1, regardless of the value on
GPAR).
NOTE:
1. Difference between GPAR/ADD_DETECT# and GMCHCFG.3 value.
Table 29. Pin and Strap Values Selecting Intel
DVO, AGP 2.0, and AGP 3.0
Card Plugged
Into AGP
Connector
Pull-up/
Termination on
GPAR Pin Prior
to Assertion of
PWROK
GPAR/
ADD_DETECT#
value on PWROK
Assertion
AGP 3.0
Detect Value
on PWROK
Assertion
GMCHCFG.3
Strap Bit
(AGP/DVO#)
AGPSTAT.3
Strap Bit
(AGP 3.0
Detect)
ADD card
pull-up
0
0 (0.75 V)
0
0
AGP 2.0 card
pull-up
1
0 (0.75 V)
1
0
AGP 3.0 card
(1)
termination to
ground
0
1 (0.35 V)
1
1