- 您现在的位置：买卖IC网 > PDF目录1778 > ADUC7033BSTZ-88-RL (Analog Devices Inc)IC BATT SENSOR PREC 48LQFP PDF资料下载
参数资料
| 型号： | ADUC7033BSTZ-88-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 114/140页 |
| 文件大小： | 0K |
| 描述： | IC BATT SENSOR PREC 48LQFP |
| 标准包装： | 2,000 |
| 功能： | 电池监控器 |
| 电源电压： | 3.5 V ~ 18 V |
| 工作温度： | -40°C ~ 115°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页当前第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页
ADuC7033
SERIAL PERIPHERAL INTERFACE
The ADuC7033 features a complete hardware serial peripheral
interface (SPI) on-chip. SPI is an industry standard synchronous
serial interface that allows eight bits of data to be synchronously
In master mode, polarity and phase of the clock is controlled by
the SPICON register, and the bit rate is defined in the SPIDIV
register using the SPI baud rate calculation, as follows:
transmitted and received simultaneously, that is, full duplex.
The SPI interface is only operational with core clock divider bits
f SERIAL CLOCK =
20 . 48 MHz
2 × ( 1 + SPIDIV )
(3)
(POWCON[2:0] = 0 or 1).
The SPI port can be configured for master or slave operation
and consists of four pins that are multiplexed with four GPIOs.
The four SPI pins are MISO, MOSI, SCLK, and SS. The pins to
The maximum speed of the SPI clock is dependent on the clock
Table 88. SPI Speed vs. Clock Divider Bits in Master Mode
CD Bits
0
1
Table 87. SPI Output Pins
Pin
Signal
Description
SPIDIV
Maximum SCLK
0x05
1.667 MHz
0x0B
0.833 MHz
GPIO_0 (GPIO Mode 1)
GPIO_1 (GPIO Mode 1)
GPIO_2 (GPIO Mode 1)
GPIO_3 (GPIO Mode 1)
SS
SCLK
MISO
MOSI
Chip select
Serial clock
Master out, slave in
Master in, slave out
In slave mode, the SPICON register must be configured with
the phase and polarity of the expected input clock. The slave
accepts data from an external master up to 5.12 Mb at CD = 0.
The formula to determine the maximum speed is as follows:
MISO (MASTER IN, SLAVE OUT DATA I/O PIN)
f SERIAL CLOCK =
f HCLK
4
The master in, slave out (MISO) pin is configured as an input
line in master mode and an output line in slave mode. The
MISO line on the master (data in) should be connected to the
MISO line in the slave device (data out). The data is transferred
as byte-wide (8-bit) serial data, MSB first.
MOSI (MASTER OUT, SLAVE IN PIN)
The MOSI (master out, slave in) pin is configured as an output
line in master mode and an input line in slave mode. The MOSI
line on the master (data out) should be connected to the MOSI
line in the slave device (data in). The data is transferred as byte-
wide (8-bit) serial data, MSB first.
SCLK (SERIAL CLOCK I/O PIN)
The master serial clock (SCLK) is used to synchronize the data
being transmitted and received through the MOSI SCLK
period. Therefore, a byte is transmitted/received after eight
SCLK periods. The SCLK pin is configured as an output in
master mode and as an input in slave mode.
In both master and slave modes, data is transmitted on one edge
of the SCL signal and sampled on the other. Therefore, it is
important that the polarity and phase are configured the same
for the master and slave devices.
CHIP SELECT (SS) INPUT PIN
In SPI slave mode, a transfer is initiated by the assertion of SS,
an active low input signal. The SPI port then transmits and
receives eight b it s of data until the transfer is concluded by the
deassertion of SS. In slave mode, SS is always an input.
SPI REGISTER DEFINITIONS
The following MMR registers are used to control the SPI
interface:
SPICON: 16-bit control register
SPISTA: 8-bit read-only status register
SPIDIV: 8-bit serial clock divider register
SPITX: 8-bit write-only transmit register
SPIRX: 8-bit read-only receive register
Rev. B | Page 114 of 140
相关PDF资料 |
PDF描述 |
|---|---|
| ADUM3070ARQZ | IC REG PUSH-PLL CTRLR ISO 16SSOP |
| AH284-WL-7 | IC HALL FAN CTRLR 500MA SC59-3 |
| AH285-WL-7 | IC HALL FAN CTRLR 400MA SC59-3 |
| AH286-WL-7 | IC HALL FAN CTRLR 400MA SC59-3 |
| AH287-YL-13 | IC HALL FAN CTRLR 500MA SOT89-5 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADUC7033BSTZ-8L | 制造商:Analog Devices 功能描述:INTEGRATED PRECISION BATTERY SENSOR 48LQFP - Trays 制造商:Rochester Electronics LLC 功能描述: |
| ADUC7033BSTZ-8L-RL | 制造商:Analog Devices 功能描述:INTEGRATED PRECISION BATTERY SENSOR 48LQFP - Tape and Reel |
| ADUC7033BSTZ8VTCRL | 制造商:Analog Devices 功能描述: |
| ADUC7034 | 制造商:AD 制造商全称:Analog Devices 功能描述:Integrated Precision Battery Sensor for Automotive |
| ADUC7034BCPZ | 功能描述:IC MCU FLASH 32K ANLG IO 48LFCSP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 标准包装:38 系列:Encore!® XP® 核心处理器:eZ8 芯体尺寸:8-位 速度:5MHz 连通性:IrDA，UART/USART 外围设备:欠压检测/复位，LED，POR，PWM，WDT 输入/输出数:16 程序存储器容量:4KB（4K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:1K x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 3.6 V 数据转换器:- 振荡器型:内部 工作温度:-40°C ~ 105°C 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 包装:管件 其它名称:269-4116Z8F0413SH005EG-ND |
发布紧急采购，3分钟左右您将得到回复。