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参数资料
| 型号： | ADUC7033BSTZ-88-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 91/140页 |
| 文件大小： | 0K |
| 描述： | IC BATT SENSOR PREC 48LQFP |
| 标准包装： | 2,000 |
| 功能： | 电池监控器 |
| 电源电压： | 3.5 V ~ 18 V |
| 工作温度： | -40°C ~ 115°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
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ADuC7033
GPIO Port1 Control Register
Name:
Address:
Default Value:
Access:
Function:
GP1CON
0xFFFF0D04
0x10000000
Read/write
The 32-bit MMR selects the pin function for each Port1 pin.
Table 60. GP1CON MMR Bit Designations
Bit
31 to 5
4
3 to 1
0
Description
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_6 Function Select Bit.
Cleared by user code to 0 to configure the GPIO_6 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to configure the GPIO_6 pin as TxD, transmit data for UART serial port.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_5 Function Select Bit.
Cleared by user code to 0 to configure the GPIO_5 pin as a general-purpose I/O (GPIO) pin.
Set by user code to 1 to configure the GPIO_5 RxD, receive data for UART serial port.
GPIO Port2 Control Register
Name:
Address:
Default Value:
Access:
Function:
GP2CON
0xFFFF0D08
0x01000000
Read/write
The 32-bit MMR selects the pin function for each Port2 pin.
Table 61. GP2CON MMR Bit Designations
Bit
31 to 25
24
23 to 21
20
19 to 17
16
15 to 5
Description
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_13 Function Select Bit.
Set to 1 by user code to route the STI data output to the STI pin.
If this bit is cleared to 0 by user code, then the STI data is not to be routed to the external STI pin even if the STI interface
is enabled correctly.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_12 Function Select Bit.
Cleared to 0 by user code to route the LIN/BSD transmit data to an internal general-purpose I/O (GPIO_12) pad that can
then be written via the GP2DAT MMR. This configuration is used in BSD mode to allow user code to write output data to
the BSD interface, and it can also be used to support diagnostic write capability to the high voltage I/O pins (see
HVCFG1[2:0]).
Set to 1 by user code to route the UART TxD (transmit data) to the LIN/BSD data pin. This configuration is used in LIN mode.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_11 Function Select Bit.
Cleared to 0 by user code to internally disable the LIN/BSD input data path. In this configuration, GPIO_11 is used to
support diagnostic readback on all external high voltage I/O pins (see HVCFG1[2:0]).
Set to 1 by user code to route input data from the LIN/BSD interface to both the LIN/BSD hardware timing/synchronization
logic and to the UART RxD (receive data). This mode must be configured by user code when using LIN or BSD modes.
Reserved. These bits are reserved and should be written as 0 by user code.
Rev. B | Page 91 of 140
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