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| 型号： | ADUC7033BSTZ-88-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 50/140页 |
| 文件大小： | 0K |
| 描述： | IC BATT SENSOR PREC 48LQFP |
| 标准包装： | 2,000 |
| 功能： | 电池监控器 |
| 电源电压： | 3.5 V ~ 18 V |
| 工作温度： | -40°C ~ 115°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
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ADuC7033
ADC Mode Register
Name:
Address:
Default Value:
Access:
Function:
ADCMDE
0xFFFF0508
0x00
Read/write
The ADC Mode MMR is an 8-bit register that configures the mode of operation of the ADC subsystem.
Table 36. ADCMDE MMR Bit Designations
Bit
7
6
5
4 to 3
2 to 0
Description
Not Used. This bit is reserved for future functionality and should be written as 0 by user code.
20 kΩ Resistor Select.
Set to 0 to select the direct path to ground as shown in Figure 20 (default).
Low Power Mode Reference Select.
Set to 1 to enable the precision voltage reference in either low power mode or low power plus mode. This increases
current consumption.
Set to 0 to enable the low power voltage reference in either low power mode or low power plus mode (default).
ADC Power Mode Configuration.
00 = ADC normal mode. If enabled, the ADC operates with normal current consumption yielding optimum electrical
performance.
01 = ADC low power mode. If enabled, the I-ADC operates with reduced current consumption. This limitation in current
consumption is achieved (at the expense of ADC noise performance) by fixing the gain to 128 and using the on-chip
low power (131 kHz) oscillator to directly drive the ADC circuits.
10 = ADC low power plus mode. If enabled, the ADC operates with reduced current consumption. In this mode, the gain
is fixed to 512 and the current consumed is approximately 200 μA more than the ADC low power mode. The additional
current consumed also ensures that the ADC noise performance is better than that achieved in ADC low power mode.
11 = not defined.
ADC Operation Mode Configuration.
000 = ADC power-down mode. All ADC circuits (including internal reference) are powered-down.
001 = ADC continuous conversion mode. In this mode, any enabled ADC continuously converts.
010 = ADC single conversion mode. In this mode, any enabled ADC performs a single conversion. The ADC enters idle
mode when the single shot conversion is complete. A single conversion takes two to three ADC clock cycles depending on the
chop mode.
011 = ADC idle mode. In this mode, the ADC is fully powered on but is held in reset.
100 = ADC self-offset calibration. In this mode, an offset calibration is performed on any enabled ADC using an internally
generated 0 V. The calibration is carried out at the user programmed ADC settings; therefore, as with a normal single
ADC conversion, it takes two to three ADC conversion cycles before a fully settled calibration result is ready. The
calibration result is automatically written to the ADCxOF MMR of the respective ADC. The ADC returns to idle mode and
the calibration and conversion ready status bits are set at the end of an offset calibration cycle.
101 = ADC self-gain calibration. In this mode, a gain calibration against an internal reference voltage is performed on all
enabled ADCs. A gain calibration is a two-stage process and takes twice the time of an offset calibration. The calibration
result is automatically written to the ADCxGN MMR of the respective ADC. The ADC returns to idle mode and the
calibration and conversion ready status bits are set at the end of a gain calibration cycle. An ADC self-gain calibration
should only be carried out on the current channel ADC. Use the preprogrammed, factory calibration coefficients
(downloaded automatically from internal Flash/EE memory) for voltage temperature measurements. If an external NTC
is used, an ADC self-calibration should be performed on the temperature channel.
110 = ADC system zero-scale calibration. In this mode, a zero-scale calibration is performed on enabled ADC channels
against an external zero-scale voltage driven at the ADC input pins. The calibration is carried out at the user
programmed ADC settings; therefore, as with a normal, single ADC conversion, it takes three ADC conversion cycles before a
fully settled calibration result is ready.
111 = ADC system full-scale calibration. In this mode, a full-scale calibration is performed on enabled ADC channels
against an external full-scale voltage driven at the ADC input pins.
Rev. B | Page 50 of 140
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