参数资料
型号: ADUC7033BSTZ-88-RL
厂商: Analog Devices Inc
文件页数: 88/140页
文件大小: 0K
描述: IC BATT SENSOR PREC 48LQFP
标准包装: 2,000
功能: 电池监控器
电源电压: 3.5 V ~ 18 V
工作温度: -40°C ~ 115°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 带卷 (TR)

ADuC7033
GENERAL-PURPOSE INPUT/OUTPUT
The ADuC7033 features nine general-purpose bidirectional
input/output (GPIO) pins. In general, many of the GPIO pins
All port pins are configured and controlled by four sets (one set
for each port) of four port-specific MMRs as follows:
have multiple functions that can be configured by user code. By
default, the GPIO pins are configured in GPIO mode. All GPIO
pins have an internal pull-up resistor with a sink capability of
0.8 mA and a source capability of 0.1 mA.
?
?
?
GPxCON: Portx control register
GPxDAT: Portx configuration and data register
GPxSET: Data Set Portx
The nine GPIOs are grouped into three ports: Port0, Port1, and
Port2. Port0 is five bits wide. Port1 and Port2 are both two bits
wide. The GPIO assignment within each port is detailed in
Table 58. A typical GPIO structure is shown Figure 3 9 .
External interrupts are present on GPIO_0, GPIO_5, GPIO_7,
and GPIO_8. These interrupts are level triggered and are active
high. These interrupts are not latched; therefore, the interrupt
? GPxCLR: Data Clear Portx
where x corresponds to the port number (0, 1, or 2).
During normal operation, user code can control the function
and state of the external GPIO pins by these general-purpose
registers. All GPIO pins retain their external level (high or low)
during power-down (POWCON) mode.
source must be present until either IRQSTA or FIQSTA are
interrogated. The interrupt source must be active for at least
one CD divided core clock to guarantee recognition.
OUTPUT DRIVE ENABLE
GPxDAT[31:24]
OUTPUT DATA
GPxDAT[23:16]
INPUT DATA
GPxDAT[7:0]
GPIO IRQ 1
REG_DVDD
GPIO
1 ONLY
AVAILABLE ON GPIO_0, GPIO_5, GPIO_7, AND GPIO_8.
Figure 39. ADuC7033 GPIO
Rev. B | Page 88 of 140
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