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参数资料
| 型号： | ADUC7033BSTZ-88-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 67/140页 |
| 文件大小： | 0K |
| 描述： | IC BATT SENSOR PREC 48LQFP |
| 标准包装： | 2,000 |
| 功能： | 电池监控器 |
| 电源电压： | 3.5 V ~ 18 V |
| 工作温度： | -40°C ~ 115°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
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ADuC7033
The operating mode, clocking mode, and programmable clock
divider are controlled using two MMRs, PLLCON and POWCON,
and the status of the PLL is indicated by PLLSTA. PLLCON
controls the operating mode of the clock system and POWCON
controls both the core clock frequency and the power-down
mode. PLLSTA indicates the presence of an oscillator on the
XTAL1 pin, the PLL lock status, and the PLL interrupt.
It is recommended that before powering down the ADuC7033,
switch the clock source for the PLL to the low power 131 kHz
oscillator to reduce wake-up time. The low power oscillator is
always active.
When the ADuC7033 wakes up from power-down, the MCU
core begins executing code as soon as the PLL begins oscillating.
This occurs before the PLL has locked to a frequency of
20.48 MHz. To ensure the Flash/EE memory controller is
executing with a valid clock, the controller is driven with a PLL
output divided by eight clock source while the PLL is locking.
When the PLL locks, the PLL output is switched from the PLL
output divided by eight to the locked PLL output.
If user code requires an accurate PLL output, user code must
poll the Lock Status Bit PLLSTA[1] after wake-up before
resuming normal code execution.
The PLL is locked within 2 ms if the PLL is clocked from an
active clock source, such as a low power 131 kHz oscillator, after
waking up.
PLLCON is a protected MMR with two 32-bit keys: PLLKEY0
(prewrite key) and PLLKEY1 (postwrite key).
PLLKEY0 = 0x000000AA
PLLKEY1 = 0x00000055
POWCON is a protected MMR with two 32-bit keys:
POWKEY0 (prewrite key) and POWKEY1 (postwrite key).
POWKEY0 = 0x00000001
POWKEY1 = 0x000000F4
An example of writing to both MMRs follows.
POWKEY0
POWCON
POWKEY1
iA1*iA2;
PLLKEY0
PLLCON
PLLKEY1
iA1*iA2;
PLLSTA Register
=
=
=
=
=
=
0x01; //POWCON KEY
0x00; //Full Power-down
0xF4; //POWCON KEY
//dummy cycle to clear the pipe line, where iA1 and iA2 are defined
as longs and are not 0
0xAA; //PLLCON KEY
0x0; //Switch to Low Power Osc.
0x55; //PLLCON KEY
//dummy cycle to prevent Flash/EE memory access during clock change
Name:
Address:
Default Value:
Access:
Function:
PLLSTA
0xFFFF0400
N/A
Read only
This 8-bit register allows user code to monitor the lock state of the PLL and the status of the external crystal.
Table 44. PLLSTA MMR Bit Designations
Bit
31 to 3
2
1
0
Description
Reserved.
XTAL Clock, Read Only. This is a live representation of the current logic level on XTAL1. It allows the user to check to see
if an external clock source is present. If present, this bit alternates high and low at a frequency of 32.768 kHz.
PLL Lock Status Bit, Read Only.
Set when the PLL is locked and outputting 20.48 MHz.
Clear when the PLL is not locked and outputting an f CORE divided by 8 clock source.
PLL Interrupt.
Set if the PLL lock status bit signal goes low.
Cleared by writing 1 to this bit.
Rev. B | Page 67 of 140
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相关代理商/技术参数 |
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|---|---|
| ADUC7033BSTZ-8L | 制造商:Analog Devices 功能描述:INTEGRATED PRECISION BATTERY SENSOR 48LQFP - Trays 制造商:Rochester Electronics LLC 功能描述: |
| ADUC7033BSTZ-8L-RL | 制造商:Analog Devices 功能描述:INTEGRATED PRECISION BATTERY SENSOR 48LQFP - Tape and Reel |
| ADUC7033BSTZ8VTCRL | 制造商:Analog Devices 功能描述: |
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| ADUC7034BCPZ | 功能描述:IC MCU FLASH 32K ANLG IO 48LFCSP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 标准包装:38 系列:Encore!® XP® 核心处理器:eZ8 芯体尺寸:8-位 速度:5MHz 连通性:IrDA，UART/USART 外围设备:欠压检测/复位，LED，POR，PWM，WDT 输入/输出数:16 程序存储器容量:4KB（4K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:1K x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 3.6 V 数据转换器:- 振荡器型:内部 工作温度:-40°C ~ 105°C 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 包装:管件 其它名称:269-4116Z8F0413SH005EG-ND |
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