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| 型号： | DK-DEV-3CLS200N |
| 厂商： | Altera |
| 文件页数： | 2/34页 |
| 文件大小： | 0K |
| 描述： | KIT DEV CYCLONE III LS EP3CLS200 |
| 产品培训模块： | Cyclone® III FPGA Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 1 |
| 系列： | Cyclone® III |
| 类型： | FPGA |
| 适用于相关产品： | EP3CLS200 |
| 所含物品： | 板 |
| 产品目录页面： | 606 (CN2011-ZH PDF) |
| 相关产品： | 544-2564-ND - IC CYCLONE III FPGA 80K 484 UBGA 544-2563-ND - IC CYCLONE III FPGA 80K 484 UBGA 544-2562-ND - IC CYCLONE III FPGA 80K 484 FBGA 544-2561-ND - IC CYCLONE III FPGA 80K 484 FBGA 544-2560-ND - IC CYCLONE III FPGA 5K 256 UBGA 544-2559-ND - IC CYCLONE III FPGA 5K 164 MBGA 544-2558-ND - IC CYCLONE III FPGA 5K 256 FBGA 544-2557-ND - IC CYCLONE III FPGA 5K 144 EQFP 544-2556-ND - IC CYCLONE III FPGA 55K 484 UBGA 544-2554-ND - IC CYCLONE III FPGA 55K 780 FBGA 更多... |
| 其它名称： | 544-2601 |
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1–2
1
Chapter 1: Cyclone III Device Datasheet
Electrical Characteristics
Conditions beyond those listed in Table 1–1 cause permanent damage to the device.
Additionally, device operation at the absolute maximum ratings for extended periods
of time has adverse effects on the device.
Table 1–1. Cyclone III Devices Absolute Maximum Ratings
Symbol
V CCINT
V CCIO
V CCA
V CCD_PLL
V I
I OUT
V ESDHBM
V ESDCDM
T STG
T J
Parameter
Supply voltage for internal logic
Supply voltage for output buffers
Supply voltage (analog) for phase-locked loop
(PLL) regulator
Supply voltage (digital) for PLL
DC input voltage
DC output current, per pin
Electrostatic discharge voltage using the human
body model
Electrostatic discharge voltage using the
charged device model
Storage temperature
Operating junction temperature
Min
–0.5
–0.5
–0.5
–0.5
–0.5
–25
—
—
–65
–40
Max
1.8
3.9
3.75
1.8
3.95
40
±2000
±500
150
125
Unit
V
V
V
V
V
mA
V
V
°C
°C
(1) Supply voltage specifications apply to voltage readings taken at the device pins with respect to ground, not at the
power supply.
Maximum Allowed Overshoot or Undershoot Voltage
During transitions, input signals may overshoot to the voltage listed in Table 1–2 and
undershoot to –2.0 V for a magnitude of currents less than 100 mA and for periods
shorter than 20 ns. Table 1–2 lists the maximum allowed input overshoot voltage and
the duration of the overshoot voltage as a percentage over the lifetime of the device.
The maximum allowed overshoot duration is specified as percentage of high-time
over the lifetime of the device.
July 2012 Altera Corporation
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