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| 型号： | DK-DEV-3CLS200N |
| 厂商： | Altera |
| 文件页数： | 3/34页 |
| 文件大小： | 0K |
| 描述： | KIT DEV CYCLONE III LS EP3CLS200 |
| 产品培训模块： | Cyclone® III FPGA Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 1 |
| 系列： | Cyclone® III |
| 类型： | FPGA |
| 适用于相关产品： | EP3CLS200 |
| 所含物品： | 板 |
| 产品目录页面： | 606 (CN2011-ZH PDF) |
| 相关产品： | 544-2564-ND - IC CYCLONE III FPGA 80K 484 UBGA 544-2563-ND - IC CYCLONE III FPGA 80K 484 UBGA 544-2562-ND - IC CYCLONE III FPGA 80K 484 FBGA 544-2561-ND - IC CYCLONE III FPGA 80K 484 FBGA 544-2560-ND - IC CYCLONE III FPGA 5K 256 UBGA 544-2559-ND - IC CYCLONE III FPGA 5K 164 MBGA 544-2558-ND - IC CYCLONE III FPGA 5K 256 FBGA 544-2557-ND - IC CYCLONE III FPGA 5K 144 EQFP 544-2556-ND - IC CYCLONE III FPGA 55K 484 UBGA 544-2554-ND - IC CYCLONE III FPGA 55K 780 FBGA 更多... |
| 其它名称： | 544-2601 |
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Chapter 1: Cyclone III Device Datasheet
Electrical Characteristics
1–3
1
A DC signal is equivalent to 100% duty cycle. For example, a signal that overshoots to
4.2 V can only be at 4.2 V for 10.74% over the lifetime of the device; for device lifetime
of 10 years, this amounts to 10.74/10ths of a year.
Table 1–2. Cyclone III Devices Maximum Allowed Overshoot During Transitions over a 10-Year
Time Frame
Symbol
V i
Parameter
AC Input
Voltage
Condition
V I = 3.95 V
V I = 4.0 V
V I = 4.05 V
V I = 4.10 V
V I = 4.15 V
V I = 4.20 V
V I = 4.25 V
V I = 4.30 V
V I = 4.35 V
V I = 4.40 V
V I = 4.45 V
V I = 4.50 V
V I = 4.60 V
V I = 4.70 V
Overshoot Duration as % of High Time
100
95.67
55.24
31.97
18.52
10.74
6.23
3.62
2.1
1.22
0.71
0.41
0.14
0.047
Unit
%
%
%
%
%
%
%
%
%
%
%
%
%
%
(1) Figure 1–1 shows the methodology to determine the overshoot duration. In the example in Figure 1–1 , overshoot
voltage is shown in red and is present on the input pin of the Cyclone III device at over 4.1 V but below 4.2 V. From
Table 1–1 , for an overshoot of 4.1 V, the percentage of high time for the overshoot can be as high as 31.97% over
a 10-year period. Percentage of high time is calculated as ([delta T]/T) × 100. This 10-year period assumes the
device is always turned on with 100% I/O toggle rate and 50% duty cycle signal. For lower I/O toggle rates and
situations in which the device is in an idle state, lifetimes are increased.
Figure 1–1. Cyclone III Devices Overshoot Duration
4.2 V
4.1 V
3.3 V
Δ T
T
July 2012
Altera Corporation
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