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| 型号： | DK-DEV-3CLS200N |
| 厂商： | Altera |
| 文件页数： | 7/34页 |
| 文件大小： | 0K |
| 描述： | KIT DEV CYCLONE III LS EP3CLS200 |
| 产品培训模块： | Cyclone® III FPGA Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 1 |
| 系列： | Cyclone® III |
| 类型： | FPGA |
| 适用于相关产品： | EP3CLS200 |
| 所含物品： | 板 |
| 产品目录页面： | 606 (CN2011-ZH PDF) |
| 相关产品： | 544-2564-ND - IC CYCLONE III FPGA 80K 484 UBGA 544-2563-ND - IC CYCLONE III FPGA 80K 484 UBGA 544-2562-ND - IC CYCLONE III FPGA 80K 484 FBGA 544-2561-ND - IC CYCLONE III FPGA 80K 484 FBGA 544-2560-ND - IC CYCLONE III FPGA 5K 256 UBGA 544-2559-ND - IC CYCLONE III FPGA 5K 164 MBGA 544-2558-ND - IC CYCLONE III FPGA 5K 256 FBGA 544-2557-ND - IC CYCLONE III FPGA 5K 144 EQFP 544-2556-ND - IC CYCLONE III FPGA 55K 484 UBGA 544-2554-ND - IC CYCLONE III FPGA 55K 780 FBGA 更多... |
| 其它名称： | 544-2601 |
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Chapter 1: Cyclone III Device Datasheet
1–7
Electrical Characteristics
The OCT resistance may vary with the variation of temperature and voltage after
calibration at device power-up. Use Table 1–8 and Equation 1–1 to determine the final
OCT resistance considering the variations after calibration at device power-up.
temperature.
Table 1–8. Cyclone III Devices OCT Variation After Calibration at Device Power-Up
Nominal Voltage
3.0
2.5
1.8
1.5
1.2
Equation 1–1.
dR/dT (%/°C)
0.262
0.234
0.219
0.199
0.161
dR/dV (%/mV)
–0.026
–0.039
–0.086
–0.136
–0.288
? R V = (V 2 – V 1 ) × 1000 × dR/dV
? R T = (T 2 – T 1 ) × dR/dT
For ? R x < 0; MF x = 1/ (| ? R x |/100 + 1)
For ? R x > 0; MF x = ? R x /100 + 1
MF = MF V × MF T
R final = R initial × MF
(1) T 2 is the final temperature.
(2) T 1 is the initial temperature.
(3) MF is multiplication factor.
(4) R final is final resistance.
(5) R initial is initial resistance.
(6) Subscript × refers to both V and T .
(7) ? R V is variation of resistance with voltage.
(8) ? R T is variation of resistance with temperature.
(9) dR/dT is the change percentage of resistance with temperature after calibration at device power-up.
(10) dR/dV is the change percentage of resistance with voltage after calibration at device power-up.
(11) V 2 is final voltage.
(12) V 1 is the initial voltage.
July 2012
Altera Corporation
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