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| 型号： | DK-DEV-3CLS200N |
| 厂商： | Altera |
| 文件页数： | 31/34页 |
| 文件大小： | 0K |
| 描述： | KIT DEV CYCLONE III LS EP3CLS200 |
| 产品培训模块： | Cyclone® III FPGA Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 1 |
| 系列： | Cyclone® III |
| 类型： | FPGA |
| 适用于相关产品： | EP3CLS200 |
| 所含物品： | 板 |
| 产品目录页面： | 606 (CN2011-ZH PDF) |
| 相关产品： | 544-2564-ND - IC CYCLONE III FPGA 80K 484 UBGA 544-2563-ND - IC CYCLONE III FPGA 80K 484 UBGA 544-2562-ND - IC CYCLONE III FPGA 80K 484 FBGA 544-2561-ND - IC CYCLONE III FPGA 80K 484 FBGA 544-2560-ND - IC CYCLONE III FPGA 5K 256 UBGA 544-2559-ND - IC CYCLONE III FPGA 5K 164 MBGA 544-2558-ND - IC CYCLONE III FPGA 5K 256 FBGA 544-2557-ND - IC CYCLONE III FPGA 5K 144 EQFP 544-2556-ND - IC CYCLONE III FPGA 55K 484 UBGA 544-2554-ND - IC CYCLONE III FPGA 55K 780 FBGA 更多... |
| 其它名称： | 544-2601 |
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Chapter 1: Cyclone III Device Datasheet
Glossary
Table 1–39. Glossary (Part 5 of 5)
1–31
Letter
V
W
X
Y
Z
July 2012
Term
V CM(DC)
V DIF(AC)
V DIF(DC)
V ICM
V ID
V IH
V IH(AC)
V IH(DC)
V IL
V IL (AC)
V IL (DC)
V IN
V OCM
V OD
V OH
V OL
V OS
V OX (AC)
V REF
V REF (AC)
V REF (DC)
V SWING (AC)
V SWING (DC)
V TT
V X (AC)
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Altera Corporation
Definitions
DC Common Mode Input Voltage.
AC differential Input Voltage: The minimum AC input differential voltage required for switching.
DC differential Input Voltage: The minimum DC input differential voltage required for switching.
Input Common Mode Voltage: The common mode of the differential signal at the receiver.
Input differential Voltage Swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
Voltage Input High: The minimum positive voltage applied to the input which is accepted by the
device as a logic high.
High-level AC input voltage.
High-level DC input voltage.
Voltage Input Low: The maximum positive voltage applied to the input which is accepted by the
device as a logic low.
Low-level AC input voltage.
Low-level DC input voltage.
DC input voltage.
Output Common Mode Voltage: The common mode of the differential signal at the transmitter.
Output differential Voltage Swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter. V OD = V OH – V OL .
Voltage Output High: The maximum positive voltage from an output which the device considers is
accepted as the minimum positive high level.
Voltage Output Low: The maximum positive voltage from an output which the device considers is
accepted as the maximum positive low level.
Output offset voltage: V OS = (V OH + V OL ) / 2.
AC differential Output cross point voltage: The voltage at which the differential output signals must
cross.
Reference voltage for SSTL, HSTL I/O Standards.
AC input reference voltage for SSTL, HSTL I/O Standards. V REF(AC) = V REF(DC) + noise. The
peak-to-peak AC noise on V REF should not exceed 2% of V REF(DC) .
DC input reference voltage for SSTL, HSTL I/O Standards.
AC differential Input Voltage: AC Input differential voltage required for switching. For the SSTL
Differential I/O Standard, refer to Input Waveforms.
DC differential Input Voltage: DC Input differential voltage required for switching. For the SSTL
Differential I/O Standard, refer to Input Waveforms.
Termination voltage for SSTL, HSTL I/O Standards.
AC differential Input cross point Voltage: The voltage at which the differential input signals must
cross.
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