参数资料
型号: IBM21P100BGB
元件分类: 总线控制器
英文描述: PCI BUS CONTROLLER, PBGA304
封装: 31 X 31 MM, HEAT SINK, PLASTIC, BGA-304
文件页数: 133/140页
文件大小: 2032K
代理商: IBM21P100BGB
IBM21P100BGB
IBM 133 PCI-X Bridge R1.1
Configuration Registers
Page 84 of 131
ppb11_pcix_regs.fm.03
July 9, 2001
5.2.5.27 PCI-to-PCI Bridge Support Extensions Register
The PCI-to-PCI Bridge Support Extensions register is read only and indicates that the bridge will not stop
clocks on a change of power state.
5.2.5.28 Data Register
The Data register is read only, since the bridge does not implement the Data register.
Address Offset
x‘96’
Access
Read only
Reset Value
x‘00’
Bus
P
ower/
C
lo
ck
Cont
ro
l
E
nab
le
B2/
B
3
S
uppo
rt
fo
r
D
3
ho
t
Reserved
7654321
0
Bit(s)
Access
Field Name and Description
7RO
Bus Power/Clock Control Enable
Forced to b‘0’ to indicate that the secondary clock cannot be controlled by this device and that power/clock con-
trol capabilities have been disabled.
6RO
B2 B3# (B2/B3 support for D3hot)
Forced to b‘0’ and has no meaning because bit 7 indicates that the power/clock control capabilities have been
disabled.
5:0
RO
Reserved
Address Offset
x‘97’
Access
Read Only
Reset Value
x‘00’
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