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参数资料
| 型号： | ICS1890Y-14 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 100M bps, SERIAL COMM CONTROLLER, PQFP64 |
| 封装： | TQFP-64 |
| 文件页数： | 2/66页 |
| 文件大小： | 1749K |
| 代理商： | ICS1890Y-14 |
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10
ICS1890
100Base-TX Physical Coding Sublayer [PCS]
Carrier Detector & Framer
The carrier detector examines the serial bit stream looking for
the SSD, the JK symbol pair. In the idle state, IDLE symbols
(all logic ones) will be received. If the carrier detector detects a
logic zero in the bit stream, it examines the following bits
looking for the first two non-contiguous zeros, confirms that
the first 5-bits form the J symbol (11000) and asserts carrier
detect. At this point the serial data is framed and the second
symbol is checked to confirm the K symbol (10001). If
successful, the following framed data (symbols) are presented
to the 4B5B decoder. If the JK pair is not confirmed, the false
carrier detect is asserted and the idle state is re-entered.
Collision Detector Collision is asserted in half-duplex
mode when transmission and data reception occur
simultaneously. In full duplex mode, collision is never asserted.
Parallel/Serial Converter
This block converts data between 5-bit symbols and 1-bit
serial data.
4B/5B Encoder/Decoder
When the ICS1890 is operating in the 100Base-TX mode,
4B5B coding is used. This coding scheme maps a 4-bit nibble
to a 5-bit code group. Since this gives 32 possible symbols
and the data only requires 16 symbols, 16 symbols are designated
control or invalid. The control symbols used are JK as the
start-of-stream delimiter (SSD), TR as the end-of-stream
delimiter (ESD), I as the IDLE symbol and H to signal an
error.All other symbols are invalid and, if detected, will set the
receive error bit in the status register.
When transmitting, nibbles from the MII are converted to 5-
bit code groups. The first 16 nibbles obtained from the MII are
the MAC frame preamble. The ICS1890replaces the first two
nibbles with the start-of-stream delimiter (the JK symbol
pair). Following the last nibble, the ICS1890 adds the end-of-
stream delimiter (the TR symbol pair).
When receiving, 5-bit code groups are converted to nibbles
and presented to the MII. If the ICS1890 detects one or more
invalid symbols, it sets the receive error bit in the status
register. When receiving a frame, the first two 5-bit code
groups received are the start-of-stream delimiter (the JK
symbol pair), the ICS1890 strips them and substitutes two
nibbles of the normal preamble pattern. The last two 5-bit code
groups are the end-of- stream delimiter (the TR symbol
group), these are stripped from the nibbles presented to the
MAC.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS1890Y-4 | 制造商:ICS 功能描述:1890Y-4 |
| ICS1891 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LAN Transceiver |
| ICS1891Y | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LAN Transceiver |
| ICS1892 | 制造商:ICS 制造商全称:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y | 制造商:ICS 制造商全称:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
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