- 您现在的位置：买卖IC网 > PDF目录67685 > ICS1890Y-14 1 CHANNEL(S), 100M bps, SERIAL COMM CONTROLLER, PQFP64 PDF资料下载
参数资料
| 型号： | ICS1890Y-14 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 100M bps, SERIAL COMM CONTROLLER, PQFP64 |
| 封装： | TQFP-64 |
| 文件页数： | 25/66页 |
| 文件大小： | 1749K |
| 代理商： | ICS1890Y-14 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页当前第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页
31
ICS1890
Duplex (bit 14)
If set to a logic one, this bit indicates that has been selected
full duplex mode. If set to a logic zero, it indicates that the half
duplex mode has been selected. This bits setting depends on
the setting of the HW/SW pin, DPXSEL pin, ANSEL pin, and
the setting of bits 0:12, 0:8, and 1:5.
Auto-Negotiation Progress (bit 13 - 11)
These three bits are encoded to indicate the progress of the
auto-negotiation cycle. These bits are initialized to zero. The
values indicate the progress of auto-negotiation. See the Auto-
Negotiation Progress Monitor section for the encodings and
additional details.
Receive Signal Error (bit 10)
If set to a logic one, the receive channel signal (bit 15) indicates
that theICS1890 read channel has, at some point, been unable
to detect the receive channel signal (either the IDLE stream in
100Base-TX mode or link pulses in 10Base-T mode). This bit
will remain set until cleared by reading the contents of register
17.
PLL Lock Error (bit 9)
If set to a logic one, the loss of PLL lock indicates that the
ICS1890 read channel PLL has failed to lock onto the read
channel signal. This bit will remain set until cleared by reading
the contents of register 17.
False Carrier (bit 8)
If set to a logic one, the false carrier indicates that the
ICS1890 has detected a false carrier sometime since this bit
was last reset. This bit will remain set until cleared by reading
the contents of register 17.
Invalid Symbol (bit 7)
If set to a logic one, the invalid symbol indicates that an
invalid symbol has been detected in a received frame since the
bit was last reset. This bit will remain set until cleared by
reading the contents of register 17.
Halt Symbol (bit 6)
If set to a logic one, the halt symbol (bit 10) indicates that the
ICS1890 has detected the halt symbol in a frame since bit 11
was last reset. This bit will remain set until cleared by reading
the contents of register 17.
Premature End (bit 5)
This bit is normally a logic zero indicating normal data streams.
If two IDLE symbols are detected during the reception of a
receive data stream, this bit is set to a logic one and the
ICS1890 returns to the idle state. This bit is initialized to a
logic zero.
Auto-Negotiation Complete (bit 5)
When set to a logic one, this bit indicates that the ICS1890
has completed the auto-negotiation process and that the
contents of registers 4, 5 and 6 are valid. When set to a logic
zero, this bit indicates that auto-negotiation is not complete or
that auto-negotiation has been disabled in the command register
(bit 12).
100Base_TX Signal Detect (bit 3)
The absence of 100Base_TX signaling on the TP_RX± pins
will cause this bit to be asserted (1)
Jabber Detect (bit 2)
When operating in the 10Base-T mode, if set to a logic one,
this bit indicates that a jabber condition occurred and that the
transmit pair has been isolated.
Remote Fault (bit 1) This is a copy of the Remote Fault bit
of the Status Register (register 1).
Link Status (bit 0) This is a copy of the Link Status bit of
the Status Register (register 1).
相关PDF资料 |
PDF描述 |
|---|---|
| ICS2059GI-02 | 27 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| ICS2304NZGI-1T | 2304 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| ICS2304NZG-1LF | 2304 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| ICS252MI-XXLF | 200 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| ICS252MI-XX | 200 MHz, OTHER CLOCK GENERATOR, PDSO8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS1890Y-4 | 制造商:ICS 功能描述:1890Y-4 |
| ICS1891 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LAN Transceiver |
| ICS1891Y | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LAN Transceiver |
| ICS1892 | 制造商:ICS 制造商全称:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y | 制造商:ICS 制造商全称:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
发布紧急采购，3分钟左右您将得到回复。