参数资料
型号: M58WR064KU70ZA6U
厂商: NUMONYX
元件分类: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44
封装: 7.50 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFBGA-44
文件页数: 32/122页
文件大小: 2187K
代理商: M58WR064KU70ZA6U
M58WRxxxKU, M58WRxxxKL
Signal descriptions
2
Signal descriptions
See Figure 1: Logic diagram and Table 1: Signal names for a brief overview of the signals
connected to this device.
2.1
Address inputs (ADQ0-ADQ15, A16-Amax)
Amax is equal to A19 in the M58WR016KU/L, to A20 in the M58WR032KU/L, and to A21 in
the M58WR064KU/L.
The address inputs select the cells in the memory array to access during bus read
operations. During bus write operations they control the commands sent to the command
interface of the program/erase controller.
2.2
Data input/output (ADQ0-ADQ15)
The data I/O outputs the data stored at the selected address during a bus read operation or
inputs a command or the data to be programmed during a bus write operation.
2.3
Chip Enable (E)
The Chip Enable input activates the memory control logic, input buffers, decoders and
sense amplifiers. When Chip Enable is at VILand Reset is at VIH the device is in active
mode. When Chip Enable is at VIH the memory is deselected, the outputs are high
impedance and the power consumption is reduced to the standby level.
2.4
Output Enable (G)
The Output Enable controls data outputs during the bus read operation of the memory.
2.5
Write Enable (W)
The Write Enable controls the bus write operation of the memory’s command interface. The
data is latched on the rising edge of Chip Enable or Write Enable, whichever occurs first.
2.6
Write Protect (WP)
Write Protect is an input that gives an additional hardware protection for each block. When
Write Protect is at VIL, the lock-down is enabled and the protection status of the locked-
down blocks cannot be changed. When Write Protect is at VIH, the lock-down is disabled
and the locked-down blocks can be locked or unlocked. (refer to Table 17: Lock status).
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