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参数资料
| 型号： | M58WR064KU70ZA6U |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44 |
| 封装： | 7.50 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFBGA-44 |
| 文件页数： | 36/122页 |
| 文件大小： | 2187K |
| 代理商： | M58WR064KU70ZA6U |
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Bus operations
M58WRxxxKU, M58WRxxxKL
3
Bus operations
There are six standard bus operations that control the device. These are bus read, bus
write, address latch, output disable, standby and reset. See Table 5: Bus operations for a
summary.
Typically glitches of less than 5 ns on Chip Enable or Write Enable are ignored by the
memory and do not affect bus write operations.
3.1
Bus read
Bus read operations output the contents of the memory array, the electronic signature, the
status register and the common flash interface. Both Chip Enable and Output Enable must
be at VIL to perform a read operation. The Chip Enable input should be used to enable the
device, and Output Enable should be used to gate data onto the output. The data read
depends on the previous command written to the memory (see Section 4: Command
characteristics for details of when the output becomes valid.
3.2
Bus write
Bus write operations write commands to the memory or latch input data to be programmed.
A bus write operation is initiated when Chip Enable and Write Enable are at VIL with Output
Enable at VIH. Commands and input data are latched on the rising edge of Write Enable or
Chip Enable, whichever occurs first. The addresses must also be latched prior to the write
operation by toggling Latch Enable (when Chip Enable is at VIL). The Latch Enable must be
tied to VIH during the bus write operation.
for details of the timing requirements.
3.3
Address latch
Address latch operations input valid addresses. Both Chip enable and Latch Enable must
be at VIL during address latch operations. The addresses are latched on the rising edge of
Latch Enable.
3.4
Output disable
The outputs are high impedance when the Output Enable is at VIH.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M58WR064T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Mbit (4Mb x 16, Multiple Bank, Burst ) 1.8V Supply Flash Memory |
| M58WR064T100ZB6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Mbit (4Mb x 16, Multiple Bank, Burst ) 1.8V Supply Flash Memory |
| M58WR064T70ZB6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Mbit (4Mb x 16, Multiple Bank, Burst ) 1.8V Supply Flash Memory |
| M58WR064T85ZB6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Mbit (4Mb x 16, Multiple Bank, Burst ) 1.8V Supply Flash Memory |
| M58WR128EB | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:128 Mbit 8Mb x 16, Multiple Bank, Burst 1.8V Supply Flash Memory |
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