参数资料
型号: M58WR064KU70ZA6U
厂商: NUMONYX
元件分类: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44
封装: 7.50 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFBGA-44
文件页数: 40/122页
文件大小: 2187K
代理商: M58WR064KU70ZA6U
Command interface - standard commands
M58WRxxxKU, M58WRxxxKL
5.4
Read CFI Query command
The Read CFI Query command reads data from the common flash interface (CFI). The
Read CFI Query command consists of one bus write cycle to an address within one of the
banks. Once the command is issued subsequent bus read operations in the same bank
read from the common flash interface.
If a Read CFI Query command is issued in a bank that is executing a program or erase
operation, the bank goes into read CFI query mode, subsequent bus read cycles output the
CFI data, and the program/erase controller continues to program or erase in the
background. This mode only supports asynchronous or single synchronous reads; it does
not support synchronous burst reads.
The status of the other banks is not affected by the command (see Table 14). After issuing a
Read CFI Query command, a Read Array command should be issued to the addressed
bank to return the bank to read array mode. Dual operations between the parameter bank
and the CFI memory space are not allowed (see Table 16: Dual operation limitations).
for details on the information contained in the common flash interface memory area.
5.5
Clear Status Register command
The Clear Status Register command reset (set to ‘0’) error bits SR1, SR3, SR4 and SR5 in
the status register. One bus write cycle is required to issue the Clear Status Register
command. After the Clear Status Register command the bank returns to read mode.
The error bits in the status register do not automatically return to ‘0’ when a new command
is issued. The error bits in the status register should be cleared before attempting a new
program or erase command.
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