- 您现在的位置：买卖IC网 > PDF目录18765 > MRF89XAT-I/MQ (Microchip Technology)RF ISM BAND TXRX 32 QFN PDF资料下载
参数资料
| 型号： | MRF89XAT-I/MQ |
| 厂商： | Microchip Technology |
| 文件页数： | 11/140页 |
| 文件大小： | 0K |
| 描述： | RF ISM BAND TXRX 32 QFN |
| 标准包装： | 1 |
| 频率： | 863MHz ~ 870MHz，902MHz ~ 928MHz，950MHz ~ 960MHz |
| 数据传输率 - 最大： | 200kbps |
| 调制或协议： | FSK，OOK |
| 应用： | ISM |
| 功率 - 输出： | 12.5dBm |
| 灵敏度： | -113dBm |
| 电源电压： | 2.1 V ~ 3.6 V |
| 电流 - 接收： | 3mA |
| 电流 - 传输： | 25mA |
| 数据接口： | PCB，表面贴装 |
| 存储容量： | * |
| 天线连接器： | PCB，表面贴装 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 其它名称： | MRF89XAT-I/MQDKR |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页当前第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页
MRF89XA
2.0 HARDWARE DESCRIPTION
The MRF89XA is an integrated, single chip, low-power
ISM band sub-GHz transceiver. A detailed block
diagram of the MRF89XA is illustrated in Figure 2-1 .
The frequency synthesizer is clocked by an external
12.8 MHz crystal, and frequency ranges from 863-870
MHz, 902-928 MHz and 950-960 MHz are possible.
The MRF89XA receiver employs a superheterodyne
architecture. The first IF is one-ninth of the RF
frequency (approximately 100 MHz). The second down
conversion, down converts the I and Q signals to
baseband in the case of the FSK receiver (zero-IF) and
to a low-IF (IF2) for the OOK receiver. After the second
down-conversion stage, the received signal is channel
select filtered and amplified to a level adequate for
demodulation. Both FSK and OOK demodulation are
available. Image rejection is achieved using a SAW
filter.
The baseband I and Q signals at the transmitter side are
digitally generated by a Direct Digital Synthesis (DDS)
whose Digital-to-Analog Converters (DAC) are followed
by two anti-aliasing low-pass filters that transform the
digital signal into analog In-Phase (I) and Quadrature
(Q) components with frequency as the selected
Frequency Deviation ( f dev ). The transmitter supports
both FSK and OOK modes of operation. The transmitter
has a typical output power of +12.5 dBm. An internal
transmit/receive switch combines the transmitter and
receiver circuits into a single-ended RFIO pin (pin 31).
The RFIO pin is connected through the impedance
matching circuitry to an external antenna. The device
operates in the low-voltage range of 2.1-3.6V, and in
Sleep mode, it operates at a very low-current state,
typically 0.1 μA.
The frequency synthesizer is based on an integer-N
PLL having PLL bandwidth of 15 kHz. Two
programmable frequency dividers in the feedback loop
of the PLL and one programmable divider on the
reference oscillator allow the LO frequency to be
adjusted. The reference frequency is generated by a
crystal oscillator running at 12.8 MHz.
The MRF89XA is controlled by a digital block that
includes registers to store the configuration settings of
the radio. These registers are accessed by a host
microcontroller through a Serial Peripheral Interface
(SPI). The quality of the data is validated using the
RSSI and bit synchronizer blocks built into the
transceiver. Data is buffered in a 64-byte transmitter or
receiver FIFO. The transceiver is controlled through a
4-wire SPI, interrupts (IRQ0 and IRQ1), PLOCK, DATA
and Chip Select pins for SPI are illustrated in
Figure 2-1 . On-chip regulators provide stable supply
voltages to sensitive blocks and allow the MRF89XA to
be used with supply voltages from 2.1-3.6V. Most
blocks are supplied with a voltage below 1.4V.
The MRF89XA supports the following feature blocks:
? Data filtering and whitening
? Bit synchronization
? 64-byte transmit/receive FIFO buffer
? General configuration registers
These features reduce the processing load, which
allows the use of simple, low-cost, 8-bit microcon-
trollers for data processing.
? 2010–2011 Microchip Technology Inc.
Preliminary
DS70622C-page 11
相关PDF资料 |
PDF描述 |
|---|---|
| 241-5-12L | XFRMR PWR 115V 12.6VCT 1A LEADS |
| DPC-40-250 | XFRMR PWR 115/230V 40VCT 250MA |
| ST-5-56 | XFRMR PWR 115V 28V 440MA 12VA |
| 6221 | TIP STAIN-STEEL SHARP-PT .06"DMM |
| ST-5-48 | XFRMR PWR 115V 24V 500MA 12VA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MRF8HP21080HR3 | 功能描述:射频MOSFET电源晶体管 HV8 2.1GHZ 160W NI780H-4 RoHS:否 制造商:Freescale Semiconductor 配置:Single 晶体管极性: 频率:1800 MHz to 2000 MHz 增益:27 dB 输出功率:100 W 汲极/源极击穿电压: 漏极连续电流: 闸/源击穿电压: 最大工作温度: 封装 / 箱体:NI-780-4 封装:Tray |
| MRF8HP21080HR5 | 功能描述:射频MOSFET电源晶体管 HV8 2.1GHZ 160W NI780H-4 RoHS:否 制造商:Freescale Semiconductor 配置:Single 晶体管极性: 频率:1800 MHz to 2000 MHz 增益:27 dB 输出功率:100 W 汲极/源极击穿电压: 漏极连续电流: 闸/源击穿电压: 最大工作温度: 封装 / 箱体:NI-780-4 封装:Tray |
| MRF8HP21080HSR3 | 功能描述:射频MOSFET电源晶体管 HV8 2.1GHZ 160W NI780S-4 RoHS:否 制造商:Freescale Semiconductor 配置:Single 晶体管极性: 频率:1800 MHz to 2000 MHz 增益:27 dB 输出功率:100 W 汲极/源极击穿电压: 漏极连续电流: 闸/源击穿电压: 最大工作温度: 封装 / 箱体:NI-780-4 封装:Tray |
| MRF8HP21080HSR5 | 功能描述:射频MOSFET电源晶体管 HV8 2.1GHZ 160W NI780S-4 RoHS:否 制造商:Freescale Semiconductor 配置:Single 晶体管极性: 频率:1800 MHz to 2000 MHz 增益:27 dB 输出功率:100 W 汲极/源极击穿电压: 漏极连续电流: 闸/源击穿电压: 最大工作温度: 封装 / 箱体:NI-780-4 封装:Tray |
| MRF8HP21130HR3 | 功能描述:射频MOSFET电源晶体管 HV8 2.1GHZ 130W NI780-4 RoHS:否 制造商:Freescale Semiconductor 配置:Single 晶体管极性: 频率:1800 MHz to 2000 MHz 增益:27 dB 输出功率:100 W 汲极/源极击穿电压: 漏极连续电流: 闸/源击穿电压: 最大工作温度: 封装 / 箱体:NI-780-4 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。