参数资料
型号: MT46V32M8BG-6AT:G
元件分类: DRAM
英文描述: 32M X 8 DDR DRAM, 0.7 ns, PBGA60
封装: (8 X 14) MM, LEAD FREE,PLASTIC, FBGA-60
文件页数: 84/93页
文件大小: 3632K
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
83
2003 Micron Technology, Inc. All rights reserved.
256Mb: x4, x8, x16 DDR SDRAM
Operations
Figure 48:
Bank WRITE – Without Auto Precharge
Notes:
1. NOP commands are shown for ease of illustration; other commands may be valid at these
times.
2. BL = 4.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T8.
5. DI b = data-in from column b; subsequent elements are provided in the programmed order.
6. See Figure 50 on page 85 for detailed DQ timing.
Command
NOP1
WRITE2
3
Bank x4
DQ
5
Address
Row
CK
CK#
CKE
A10
BA0, BA1
tCK
tCH
tCL
tIS
tIH
tIS
tIH
tIS
tIH
tRCD
tRAS
tRP
tWR
T0
T1
T2
T3
T4
T5
T5n
T6
T7
T8
T4n
ACT
Col n
One bank
All banks
Bank x
PRE
Bank x
tDQSL tDQSH tWPST
DQS
DM
DI
b
tDS
tDH
tDQSS (NOM)
tWPRE
tWPRES
Don’t Care
Transitioning Data
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