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参数资料
| 型号： | RB80526PZ667256 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, 667 MHz, MICROPROCESSOR, CPGA370 |
| 封装： | FCPGA-370 |
| 文件页数： | 14/74页 |
| 文件大小： | 502K |
| 代理商： | RB80526PZ667256 |
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Datasheet
21
Pentium III Processor for the PGA370 Socket up to 750 MHz
2.9
Test Access Port (TAP) Connection
Due to the voltage levels supported by other components in the Test Access Port (TAP) logic, it is
recommended that the processor be the first in the TAP chain and followed by any other
components within the system. A translation buffer should be used to connect the rest of the chain
unless one of the other components is capable of accepting a 1.5V input. Similar considerations
must be made for TCK, TMS, and TRST# signals.
2.10
Maximum Ratings
Table 5 contains processor stress ratings only. Functional operation at the absolute maximum and
minimum is not implied nor guaranteed. The processor should not receive a clock while subjected
to these conditions. Functional operating conditions are given in the AC and DC tables in
Section 2.11 through Section 2.13. Extended exposure to the maximum ratings may affect device
reliability. Furthermore, although the processor contains protective circuitry to resist damage from
static electric discharge, one should always take precautions to avoid high static voltages or electric
fields.
NOTES:
1. Input voltage can never exceed VSS + 2.18 volts.
2. Input voltage can never go below VTT - 2.18 volts.
3. Parameter applies to CMOS (except BCLK, PICCLK, and PWRGOOD), APIC, and TAP bus signal groups
only.
4. Parameter applies to CMOS signals BCLK, PICCLK, and PWRGOOD only.
2.11
Processor DC Specifications
The processor DC specifications in this section are defined at the PGA370 socket pins (bottom side
of the motherboard). See Section 7.0 for the processor signal descriptions and Section 5.3 for the
signal listings.
Most of the signals on the processor system bus are in the AGTL+ signal group. These signals are
specified to be terminated to 1.5V. The DC specifications for these signals are listed in Table 7 on
page 24.
To allow connection with other devices, the clock, CMOS, APIC, and TAP signals are designed to
interface at non-AGTL+ levels. The DC specifications for these pins are listed in Table 8 on
page 24.
Table 5.
Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Unit
Notes
TSTORAGE
Processor storage temperature
–40
85
°C
VCCCORE and
VTT
Processor core voltage and termination
supply voltage with respect to VSS
–0.5
2.1
V
VinAGTL
AGTL+ buffer input voltage
VTT - 2.18
2.18
V
1, 2
VinCMOS1.5
CMOS buffer DC input voltage with respect
to VSS
VTT - 2.18
2.18
V
1, 2, 3
VinCMOS2.5
CMOS buffer DC input voltage with respect
to VSS
-0.58
3.18
V
4
IVID
Max VID pin current
5
mA
ICPUPRES#
Max CPUPRES# pin current
5
mA
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RB80526PZ733256 | 制造商:Rochester Electronics LLC 功能描述:PIII 733/133 256K ON DIE FC-PGA - Bulk |
| RB80526PZ733256S L4CG | 制造商:Intel 功能描述:MPU Pentium 制造商:Intel 功能描述:MPU Pentium? III Processor 0.18um 733MHz 370-Pin FCPGA |
| RB80526PZ733256S L4ZL | 制造商:Intel 功能描述:MPU Pentium 制造商:Intel 功能描述:MPU Pentium? III Processor 0.18um 733MHz 370-Pin FCPGA |
| RB80526PZ800256 | 制造商:Rochester Electronics LLC 功能描述:PIII 800/133 256K ON DIE FC-PGA - Bulk |
| RB80526PZ866256 | 制造商:Rochester Electronics LLC 功能描述:PIII 866/133 256K ON DIE FC-PGA - Bulk |
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