参数资料
型号: RB80526PZ667256
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 64-BIT, 667 MHz, MICROPROCESSOR, CPGA370
封装: FCPGA-370
文件页数: 23/74页
文件大小: 502K
代理商: RB80526PZ667256
Datasheet
3
Pentium III Processor for the PGA370 Socket up to 750MHz
Contents
1.0
Introduction......................................................................................................................... 7
1.1
Terminology........................................................................................................... 8
1.1.1
Package and Processor Terminology ...................................................... 8
1.1.2
Processor Naming Convention................................................................. 9
1.2
Related Documents............................................................................................. 10
2.0
Electrical Specifications....................................................................................................11
2.1
Processor System Bus and VREF........................................................................11
2.2
Clock Control and Low Power States.................................................................. 12
2.2.1
Normal State—State 1 ........................................................................... 13
2.2.2
AutoHALT Powerdown State—State 2................................................... 13
2.2.3
Stop-Grant State—State 3 .....................................................................13
2.2.4
HALT/Grant Snoop State—State 4 ........................................................ 13
2.2.5
Sleep State—State 5.............................................................................. 14
2.2.6
Deep Sleep State—State 6 .................................................................... 14
2.2.7
Clock Control.......................................................................................... 14
2.3
Power and Ground Pins ...................................................................................... 15
2.3.1
Phase Lock Loop (PLL) Power...............................................................16
2.4
Decoupling Guidelines ....................................................................................... 16
2.4.1
Processor VCCCORE Decoupling............................................................16
2.4.2
Processor System Bus AGTL+ Decoupling............................................16
2.5
Processor System Bus Clock and Processor Clocking ....................................... 17
2.6
Voltage Identification ........................................................................................... 17
2.7
Processor System Bus Unused Pins................................................................... 18
2.8
Processor System Bus Signal Groups ................................................................ 18
2.8.1
Asynchronous vs. Synchronous for System Bus Signals ....................... 19
2.8.2
System Bus Frequency Select Signals (BSEL[1:0]) ...............................20
2.9
Test Access Port (TAP) Connection.................................................................... 21
2.10
Maximum Ratings................................................................................................ 21
2.11
Processor DC Specifications............................................................................... 21
2.12
AGTL+ System Bus Specifications .....................................................................25
2.13
System Bus AC Specifications ............................................................................25
2.13.1 I/O Buffer Model Password .................................................................... 26
3.0
Signal Quality Specifications ............................................................................................ 33
3.1
BCLK and PICCLK Signal Quality Specifications and Measurement
Guidelines ........................................................................................................... 33
3.2
AGTL+ Signal Quality Specifications and Measurement Guidelines ..................34
3.3
AGTL+ Signal Quality Specifications and Measurement Guidelines ..................35
3.3.1
Overshoot/Undershoot Guidelines ......................................................... 35
3.3.2
Overshoot/Undershoot Magnitude ......................................................... 36
3.3.3
Overshoot/Undershoot Pulse Duration................................................... 36
3.3.4
Activity Factor .........................................................................................36
3.3.5
Reading Overshoot/Undershoot Specification Tables............................ 37
3.3.6
Determining if a System meets the Overshoot/Undershoot
Specifications .........................................................................................38
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