参数资料
型号: RB80526PZ667256
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 64-BIT, 667 MHz, MICROPROCESSOR, CPGA370
封装: FCPGA-370
文件页数: 4/74页
文件大小: 502K
代理商: RB80526PZ667256
12
Datasheet
Pentium III Processor for the PGA370 Socket up to 750 MHz
2.2
Clock Control and Low Power States
Processors allow the use of AutoHALT, Stop-Grant, Sleep, and Deep Sleep states to reduce power
consumption by stopping the clock to internal sections of the processor, depending on each
particular state. See Figure 3 for a visual representation of the processor low power states.
For the processor to fully realize the low current consumption of the Stop-Grant, Sleep and Deep
Sleep states, a Model Specific Register (MSR) bit must be set. For the MSR at 02AH (Hex), bit 26
must be set to a ‘1’ (this is the power on default setting) for the processor to stop all internal clocks
during these modes. For more information, see the Intel Architecture Software Developer’s
Manual, Volume 3: System Programming Guide.
Figure 2. AGTL+ Bus Topology in a Uniprocessor Configuration
Processor
Chipset
Figure 3. Stop Clock State Machine
PCB757a
2. Auto HALT P ow er Dow n S tate
BCLK running.
Snoops and interrupts allowed.
HALT Instruction and
HALT Bus Cycle G enerated
INIT#, BINIT#, INTR,
SM I#, RESE T#
1. Norm al State
Norm al execution.
STPCLK#
Asserted
STPCLK#
De-asserted
3. Stop G rant State
BCLK running.
Snoops and interrupts allowed.
SLP#
Asserted
SLP#
De-asserted
5. Sleep State
BCLK running.
No snoops or interrupts allowed.
BCLK
Input
Stopped
BCLK
Input
Restarted
6. Deep Sleep State
BCLK stopped.
No snoops or interrupts allowed.
4. HALT/G rant Snoop State
BCLK running.
Service snoops to caches.
Snoop Event O ccurs
Snoop Event Serviced
Snoop
Event
O ccurs
Snoop
Event
Serviced
STPCLK# A sserted
STPCLK# De-asserted
and S top -G rant S ta te
en te re d from
Auto H A LT
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