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| 型号： | RB80526PZ667256 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, 667 MHz, MICROPROCESSOR, CPGA370 |
| 封装： | FCPGA-370 |
| 文件页数： | 28/74页 |
| 文件大小： | 502K |
| 代理商： | RB80526PZ667256 |
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34
Datasheet
Pentium III Processor for the PGA370 Socket up to 750 MHz
3.2
AGTL+ Signal Quality Specifications and Measurement
Guidelines
Many scenarios have been simulated to generate a set of AGTL+ layout guidelines which are
available in the appropriate platform design guide. Refer to the Intel Pentium II Processor
Developer's Manual (Order Number 243502) for the AGTL+ buffer specification.
Table 18 provides the AGTL+ signal quality specifications for the processor for use in simulating
signal quality at the processor pins.
The Pentium III processor for the PGA370 socket maximum allowable overshoot and undershoot
specifications for a given duration of time are detailed in Table 20 through Table 22. Figure 14
shows the AGTL+ ringback tolerance and Figure 15 shows the overshoot/undershoot waveform.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all Pentium III processors frequencies.
2. Specifications are for the edge rate of 0.3 - 0.8V/ns. See Figure 14 for the generic waveform.
3. All values specified by design characterization.
4. Please see Table 20 for maximum allowable overshoot.
5. Ringback between VREF + 100 mV and VREF + 200 mV or VREF - 200 mV and VREF - 100 mVs requires the
flight time measurements to be adjusted as described in the Intel AGTL+ Specifications (
IntelPentiumII
Developers Manual). Ringback below VREF + 100 mV or above VREF - 100 mV is not supported.
6. Intel recommends simulations not exceed a ringback value of VREF ±200 mV to allow margin for other
sources of system noise.
7. A negative value for
ρ indicates that the amplitude of ringback is above V
REF. (i.e., φ = -100 mV specifies the
signal cannot ringback below VREF + 100 mV).
8.
φ and ρ: are measured relative to V
REF. α: is measured relative to VREF + 200 mV.
Figure 13. BCLK, PICCLK Generic Clock Waveform at the Processor Pins
V2
V1
V3
V4
V5
Table 18. AGTL+ Signal Groups Ringback Tolerance Specifications at the Processor
Pins 1, 2, 3
T# Parameter
Min
Unit
Figure
Notes
α: Overshoot
100
mV
14
4, 8
τ: Minimum Time at High
0.50
ns
14
ρ: Amplitude of Ringback
±200
mV
14
5, 6, 7, 8
φ: Final Settling Voltage
200
mV
14
8
δ: Duration of Squarewave Ringback
N/A
ns
14
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RB80526PZ733256 | 制造商:Rochester Electronics LLC 功能描述:PIII 733/133 256K ON DIE FC-PGA - Bulk |
| RB80526PZ733256S L4CG | 制造商:Intel 功能描述:MPU Pentium 制造商:Intel 功能描述:MPU Pentium? III Processor 0.18um 733MHz 370-Pin FCPGA |
| RB80526PZ733256S L4ZL | 制造商:Intel 功能描述:MPU Pentium 制造商:Intel 功能描述:MPU Pentium? III Processor 0.18um 733MHz 370-Pin FCPGA |
| RB80526PZ800256 | 制造商:Rochester Electronics LLC 功能描述:PIII 800/133 256K ON DIE FC-PGA - Bulk |
| RB80526PZ866256 | 制造商:Rochester Electronics LLC 功能描述:PIII 866/133 256K ON DIE FC-PGA - Bulk |
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