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参数资料
| 型号： | RB80526PZ667256 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, 667 MHz, MICROPROCESSOR, CPGA370 |
| 封装： | FCPGA-370 |
| 文件页数： | 7/74页 |
| 文件大小： | 502K |
| 代理商： | RB80526PZ667256 |
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Datasheet
15
Pentium III Processor for the PGA370 Socket up to 750 MHz
When the processor is in Sleep and Deep Sleep states, it does not respond to interrupts or snoop
transactions. During the Sleep state, the internal clock to the L2 cache is not stopped. During the
Deep Sleep state, the internal clock to the L2 cache is stopped. The internal clock to the L2 cache is
restarted only after the internal clocking mechanism for the processor is stable (i.e., the processor
has re-entered Sleep state).
PICCLK should not be removed during the AutoHALT Power Down or Stop-Grant states.
PICCLK can be removed during the Sleep or Deep Sleep states. When transitioning from the Deep
Sleep state to the Sleep state, PICCLK must be restarted with BCLK.
2.3
Power and Ground Pins
The operating voltage of the Pentium III processor for the PGA370 socket is the same for the core
and the L2 cache; VCCCORE. There are four pins defined on the package for voltage identification
(VID). These pins specify the voltage required by the processor core. These have been added to
cleanly support voltage specification variations on current and future processors.
For clean on-chip power and voltage reference distribution, the Pentium III processors in the
FC-PGA package have 75 VCCCORE, 8 VREF, 15 VTT, and 77 VSS (ground) inputs. VCCCORE
inputs supply the processor core, including the on-die L2 cache. VTT inputs (1.5V) are used to
provide an AGTL+ termination voltage to the processor, and the VREF inputs are used as the
AGTL+ reference voltage for the processor. Note that not all VTT inputs must be connected to the
VTT supply. Refer to Section 5.3 for more details.
On the motherboard, all VCCCORE pins must be connected to a voltage island (an island is a portion
of a power plane that has been divided, or an entire plane). In addition, the motherboard must
implement the VTT pins as a voltage island or large trace. Similarly, all GND pins must be
connected to a system ground plane.
Three additional power related pins exist on a processors utilizing the PGA370 socket. They are
VCC1.5, VCC2.5 and VCCCMOS.
The VCCCMOS pin provides the CMOS voltage for the pull-up resistors required on the system
platform. A 2.5V source must be provided to the VCC2.5 pin and a 1.5V source must be provided
to the VCC1.5 pin. The source for VCC1.5 must be the same as the one supplying VTT. The processor
routes the compatible CMOS voltage source (1.5V or 2.5V) through the package and out to the
VCCCMOS output pin. Processors based on 0.25 micron technology (e.g., the Intel Celeron
processor) utilize 2.5V CMOS buffers. Processors based on 0.18 micron technology (e.g., the
Pentium III processor for the PGA370 socket) utilize 1.5V CMOS buffers. The signal VCOREDET
can be used by hardware on the motherboard to detect which CMOS voltage the processor requires.
A VCOREDET connected to VSS within the processor indicates a 1.5V requirement on VCCCMOS.
Refer to Figure 4.
Each power signal must meet the specifications stated in Table 6 on page 22.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RB80526PZ733256 | 制造商:Rochester Electronics LLC 功能描述:PIII 733/133 256K ON DIE FC-PGA - Bulk |
| RB80526PZ733256S L4CG | 制造商:Intel 功能描述:MPU Pentium 制造商:Intel 功能描述:MPU Pentium? III Processor 0.18um 733MHz 370-Pin FCPGA |
| RB80526PZ733256S L4ZL | 制造商:Intel 功能描述:MPU Pentium 制造商:Intel 功能描述:MPU Pentium? III Processor 0.18um 733MHz 370-Pin FCPGA |
| RB80526PZ800256 | 制造商:Rochester Electronics LLC 功能描述:PIII 800/133 256K ON DIE FC-PGA - Bulk |
| RB80526PZ866256 | 制造商:Rochester Electronics LLC 功能描述:PIII 866/133 256K ON DIE FC-PGA - Bulk |
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