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参数资料
| 型号： | RH80532NC021256 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 1500 MHz, MICROPROCESSOR, CPGA478 |
| 封装： | MICRO, FLIP CHIP, PGA-478 |
| 文件页数： | 13/91页 |
| 文件大小： | 1142K |
| 代理商： | RH80532NC021256 |
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20
Datasheet
Electrical Specifications
2.7
Asynchronous GTL+ Signals
Mobile Celeron processor does not utilize CMOS voltage levels on any signals that connect to the
processor. As a result, legacy input signals such as A20M#, IGNNE#, INIT#, LINT0/INTR,
LINT1/NMI, SMI#, SLP#, and STPCLK# use GTL+ input buffers. Legacy output FERR#/PBE#
and other non-AGTL+ signals (THERMTRIP# and PROCHOT#) use GTL+ output buffers. All of
these signals follow the same DC requirements as AGTL+ signals, however the outputs are not
actively driven high (during a logical 0 to 1 transition) by the processor (the major difference
between GTL+ and AGTL+). These signals do not have setup or hold time specifications in relation
to BCLK[1:0]. However, all of the Asynchronous GTL+ signals are required to be asserted for at
least two BCLKs in order for the processor to recognize them. See Section 2.11 and Section 2.13
for the DC and AC specifications for the Asynchronous GTL+ signal groups.
2.8
Test Access Port (TAP) Connection
Due to the voltage levels supported by other components in the Test Access Port (TAP) logic, it is
recommended that the mobile Celeron processor be first in the TAP chain and followed by any
other components within the system. A translation buffer should be used to connect to the rest of
the chain unless one of the other components is capable of accepting an input of the appropriate
voltage level. Similar considerations must be made for TCK, TMS, and TRST#. Two copies of
each signal may be required, with each driving a different voltage level.
2.9
FSB Frequency Select Signals (BSEL[1:0])
The BSEL[1:0] are output signals used to select the frequency of the processor input clock
(BCLK[1:0]). Table 5 defines the possible combinations of the signals and the frequency
associated with each combination. The required frequency is determined by the processor, chipset,
and clock synthesizer. All agents must operate at the same frequency.
The mobile Celeron processor currently operates at a 400-MHz FSB frequency (selected by a
100-MHz BCLK[1:0] frequency). Individual processors will only operate at their specified FSB
frequency.
For more information about these pins refer to Section 5.2 and the appropriate platform design
guidelines.
Table 5.
BSEL[1:0] Frequency Table for BCLK[1:0]
BSEL1
BSEL0
Function
L
100 MHz
L
H
RESERVED
H
L
RESERVED
H
RESERVED
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RH80532NC025256 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microprocessor |
| RH80532NC029256 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microprocessor |
| RH80532NC033256 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microprocessor |
| RH80532NC049256 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| RH80532NC049256S L8SB | 制造商:Intel 功能描述:INTEL CELERON PROCESSOR AVAILABLE AT 1.60 GHZ, 1.8 GHZ, 2.00 GHZ, 2.2 GHZ |
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