参数资料
型号: RH80532NC021256
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 1500 MHz, MICROPROCESSOR, CPGA478
封装: MICRO, FLIP CHIP, PGA-478
文件页数: 41/91页
文件大小: 1142K
代理商: RH80532NC021256
46
Datasheet
FSB Signal Quality Specifications
3.2
FSB Signal Quality Specifications and Measurement
Guidelines
Various scenarios have been simulated to generate a set of AGTL+ layout guidelines which are
available in the Mobile Intel Pentium 4 Processor-M and Intel 845MP/845MZ Chipset
Platform Design Guide.
Table 26 and Table 27 provides the signal quality specifications for all processor signals for use in
simulating signal quality at the processor core silicon (pads).
Mobile Celeron processor maximum allowable overshoot and undershoot specifications for a given
duration of time are detailed in Table 28 through Table 31. Figure 24 shows the FSB ringback
tolerance for low-to-high transitions and Figure 25 shows ringback tolerance for high-to-low
transitions.
NOTES:
1. All signal integrity specifications are measured at the processor silicon (pads).
2. Unless otherwise noted, all specifications in this table apply to all mobile Celeron processor frequencies.
3. Specifications are for the edge rate of 0.3 - 4.0 V/ns.
4. All values specified by design characterization.
5. Please see Section 3.3 for maximum allowable overshoot.
6. Ringback between GTLREF + 10% and GTLREF - 10% is not supported.
7. Intel recommends simulations not exceed a ringback value of GTLREF
± 200 mV to allow margin for other
sources of system noise.
Figure 23. BCLK Signal Integrity Waveform
Crossing
Voltage
Threshold
Region
VH
VL
Overshoot
Undershoot
Ringback
Margin
Rising Edge
Ringback
Falling Edge
Ringback,
BCLK0
BCLK1
Crossing
Voltage
Table 26. Ringback Specifications for AGTL+ and Asynchronous GTL+ Signal Groups
Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Notes
All Signals
0
1
GTLREF + 10%
V
1,2,3,4,5,6,7
All Signals
1
0
GTLREF - 10%
V
1,2,3,4,5,6,7
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