参数资料
型号: RH80532NC021256
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 1500 MHz, MICROPROCESSOR, CPGA478
封装: MICRO, FLIP CHIP, PGA-478
文件页数: 85/91页
文件大小: 1142K
代理商: RH80532NC021256
86
Datasheet
Thermal Specifications and Design Considerations
Thermal monitor controls the processor temperature by modulating (starting and stopping) the
processor core clocks. The processor clocks are modulated when the thermal control circuit (TCC)
is activated. Thermal monitor uses two modes to activate the TCC: Automatic mode and On-
Demand mode. Automatic mode is required for the processor to operate within specifications
and must first be enabled via BIOS. Once automatic mode is enabled, the TCC will activate only
when the internal die temperature is very near the temperature limits of the processor. When TCC
is enabled, and a high temperature situation exists (i.e. TCC is active), the clocks will be modulated
by alternately turning the clocks off and on at a duty cycle specific to the processor (typically
30-50%). An under-designed thermal solution that is not able to prevent excessive activation of the
TCC in the anticipated ambient environment may cause a noticeable performance loss. Cycle times
are processor speed dependent and will decrease linearly as processor core frequencies increase.
Once the temperature has returned to a non-critical level, modulation ceases and TCC goes
inactive. A small amount of hysteresis has been included to prevent rapid active/inactive transitions
of the TCC when the processor temperature is near the trip point. Processor performance will be
decreased by approximately the same amount as the duty cycle when the TCC is active, however,
with a properly designed and characterized thermal solution, the TCC will only be activated briefly
when running the most power intensive applications in a high ambient temperature environment.
For automatic mode, the duty cycle is factory configured and cannot be modified. Also, automatic
mode does not require any additional hardware, software drivers, or interrupt handling routines.
The TCC may also be activated via On-Demand mode. If bit 4 of the ACPI Thermal Monitor
Control register is written to a 1, the TCC will be activated immediately, independent of the
processor temperature. When using On-Demand mode to activate the TCC, the duty cycle of the
clock modulation is programmable via bits 3:1 of the same ACPI Thermal Monitor Control
register. In automatic mode, the duty cycle is fixed, however in On-Demand mode, the duty cycle
can be programmed from 12.5% on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments. On-
Demand mode may be used at the same time Automatic mode is enabled, however, if the system
tries to enable the TCC via On-Demand mode at the same time automatic mode is enabled AND a
high temperature condition exists, the duty cycle of the automatic mode will override the duty
cycle selected by the On-Demand mode.
An external signal, PROCHOT# (processor hot) is asserted when the processor die temperature has
reached its thermal limit. If the TCC is enabled (note that the TCC must be enabled for the
processor to be operating within spec), TCC will be active when the PROCHOT# signal is active.
The temperature at which the thermal control circuit activates is not user configurable and is not
software visible. Bus snooping and interrupt latching are active while the TCC is active.
Besides the thermal sensor and TCC, the thermal monitor feature also includes one ACPI register,
performance monitoring logic, bits in three model specific registers (MSR), and one I/O pin
(PROCHOT#). All are available to monitor and control the state of the thermal monitor feature.
Thermal monitor can be configured to generate an interrupt upon the assertion or de-assertion of
PROCHOT#.
If Automatic mode is disabled, the processor will be operating out of specification. Regardless of
enabling of the automatic or On-Demand modes, in the event of a catastrophic cooling failure, the
processor will automatically shut down when the silicon has reached a temperature of
approximately 135 °C. At this point the FSB signal THERMTRIP# will go active and stay active
until RESET# has been initiated. THERMTRIP# activation is independent of processor activity
and does not generate any bus cycles. If THERMTRIP# is asserted, processor core voltage (VCC)
must be removed within the timeframe defined in Table 20.
§
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