参数资料
型号: RH80532NC021256
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 1500 MHz, MICROPROCESSOR, CPGA478
封装: MICRO, FLIP CHIP, PGA-478
文件页数: 90/91页
文件大小: 1142K
代理商: RH80532NC021256
90
Datasheet
Configuration and Low Power Features
7.2.6
Deep Sleep State
Deep Sleep state is a very low power state the processor can enter while maintaining context. Deep
Sleep state is entered by asserting the DPSLP# pin. The DPSLP# pin must be de-asserted to re-
enter the Sleep state. A period of 30 microseconds (to allow for PLL stabilization) must occur
before the processor can be considered to be in the Sleep State. Once in the Sleep state, the SLP#
pin can be deasserted to re-enter the Stop-Grant state.
The clock may be stopped when the processor is in the Deep Sleep state in order to support the
ACPI S1 state. The clock may only be stopped after DPSLP# is asserted and must be restarted
before DPSLP# is deasserted. To provide maximum power conservation when stopping the clock
during Deep Sleep, hold the BLCK0 input at VOL and the BCLK1 input at VOH.
While in Deep Sleep state, the processor is incapable of responding to snoop transactions or
latching interrupt signals. No transitions of signals are allowed on the FSB while the processor is in
Deep Sleep state. Any transition on an input signal before the processor has returned to Stop-Grant
state will result in unpredictable behavior.
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