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参数资料
| 型号： | RH80532NC021256 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 1500 MHz, MICROPROCESSOR, CPGA478 |
| 封装： | MICRO, FLIP CHIP, PGA-478 |
| 文件页数： | 47/91页 |
| 文件大小： | 1142K |
| 代理商： | RH80532NC021256 |
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Datasheet
51
FSB Signal Quality Specifications
The above procedure is similar for undershoot after the undershoot waveform has been converted
to look like an overshoot. Undershoot events must be analyzed separately from overshoot events as
they are mutually exclusive.
3.3.6
Conformance Determination to Overshoot/Undershoot
Specifications
The overshoot/undershoot specifications listed in the following tables specify the allowable
overshoot/undershoot for a single overshoot/undershoot event. However, most systems will have
multiple overshoot and/or undershoot events that each have their own set of parameters (duration,
AF and magnitude). While each overshoot on its own may meet the overshoot specification, when
you add the total impact of all overshoot events, the system may fail. A guideline to ensure a
system passes the overshoot and undershoot specifications is shown below.
1. Ensure no signal ever exceeds VCC or -0.25 V OR
2. If only one overshoot/undershoot event magnitude occurs, ensure it meets the over/undershoot
specifications in the following tables OR
3. If multiple overshoots and/or multiple undershoots occur, measure the worst case pulse
duration for each magnitude and compare the results against the AF = 1 specifications. If all of
these worst case overshoot or undershoot events meet the specifications (measured time <
specifications) in the table (where AF=1), then the system passes.
1. Absolute Maximum Overshoot magnitude of 1.70 V must never be exceeded.
2. Absolute Maximum Overshoot is measured relative to VSS, Pulse Duration of overshoot is measured relative
to VCC.
3. Absolute Maximum Undershoot and Pulse Duration of undershoot is measured relative to VSS.
4. Ringback below VCC can not be subtracted from overshoots/undershoots.
5. Lesser undershoot does not allocate longer or larger overshoot.
6. OEM's are strongly encouraged to follow Intel provided layout guidelines.
7. All values specified by design characterization.
NOTES:
1. These specifications are measured at the processor core silicon.
2. BCLK period is 10 ns.
Table 28. Source Synchronous (400 MHz) AGTL+ Signal Group Overshoot/Undershoot
Tolerance
Absolute
Maximum
Overshoot
(V)
Absolute
Maximum
Undershoot
(V)
Pulse
Duration (ns)
AF = 1
Pulse
Duration (ns)
AF = 0.1
Pulse
Duration (ns)
AF = 0.01
Notes 1,2
1.700
-0.400
0.11
1.05
5.00
1.650
-0.350
0.24
2.40
5.00
1.600
-0.300
0.53
5.00
1.550
-0.250
1.19
5.00
1.500
-0.200
5.00
1.450
-0.150
5.00
1.400
-0.100
5.00
1.350
-0.050
5.00
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| RH80532NC049256S L8SB | 制造商:Intel 功能描述:INTEL CELERON PROCESSOR AVAILABLE AT 1.60 GHZ, 1.8 GHZ, 2.00 GHZ, 2.2 GHZ |
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