Datasheet
27
Electrical Specifications
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. VIL is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low value.
3. VIH is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
value.
4. VIH and VOH may experience excursions above VCC. However, input signal drivers must comply with the
signal quality specifications in Section 3.
5. Refer to processor I/O Buffer Models for I/V characteristics.
6. The VCC referred to in these specifications is the instantaneous VCC.
7. Vol max of 0.450 Volts is guaranteed when driving into a test load of 50
8. Leakage to VSS with pin held at VCC.
9. Leakage to VCC with pin held at 300 mV.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. All outputs are open-drain.
3. VIH and VOH may experience excursions above VCC. However, input signal drivers must comply with the
signal quality specifications in Chapter 3.0.
4. The VCC referred to in these specifications refers to instantaneous VCC.
5. This specification applies to the asynchronous GTL+ signal group.
6. The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load shown in
Figure 7.
7. Refer to the processor I/O Buffer Models for I/V characteristics.
8. Vol max of 0.270 Volts is guaranteed when driving into a test load of 50
Asynchronous GTL+ signals.
9. Leakage to VSS with pin held at VCC.
10. Leakage to VCC with pin held at 300 mV.
Table 11. AGTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes1
GTLREF
Reference Voltage
2/3 Vcc - 2%
2/3 Vcc + 2%
V
VIH
Input High Voltage
1.10*GTLREF
VCC
V2,6
VIL
Input Low Voltage
0.0
0.9*GTLREF
V
3,4,6
VOH
Output High Voltage
N/A
Vcc
V
7
IOL
Output Low Current
N/A
50
mA
6
IHI
Pin Leakage High
N/A
100
A
8
ILO
Pin Leakage Low
N/A
500
A
9
RON
Buffer On Resistance
7
11
5
Table 12. Asynchronous GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes1
VIH
Input High Voltage
Asynch GTL+
1.10*GTLREF
VCC
V3, 4, 5
VIL
Input Low Voltage
Asynch. GTL+
00.9*GTLREF
V
5
VOH
Output High Voltage
N/A
V
CC
V2, 3, 4
IOL
Output Low Current
N/A
50
mA
6, 8
IHI
Pin Leakage High
N/A
100
A
9
ILO
Pin Leakage Low
N/A
500
A
10
Ron
Buffer On Resistance
Asynch GTL+
711
5, 7