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参数资料
| 型号： | S71JL064H80BFI122 |
| 厂商： | ADVANCED MICRO DEVICES INC |
| 元件分类： | 存储器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA73 |
| 封装： | 11.60 X 8 MM, FBGA-73 |
| 文件页数： | 31/95页 |
| 文件大小： | 2244K |
| 代理商： | S71JL064H80BFI122 |
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February 25, 2004 S71JLxxxHxx_00A1
S29JL064H
37
Pre l i m i n a r y
S29JL064H
For Multi-Chip Products (MCP)
64 Megabit (8 M x 8-Bit/4 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Read/Write
Flash Memory
Distinctive Characteristics
Architectural Advantages
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in another bank.
— Zero latency between read and write operations
Flexible Bank architecture
— Read may occur in any of the three banks not being
written or erased.
— Four banks may be grouped by customer to achieve
desired bank divisions.
Boot Sectors
— Top and bottom boot sectors in the same device
— Any combination of sectors can be erased
Manufactured on 130 nm process technology
SecSi (Secured Silicon) Sector: Extra 256 Byte
sector
— Factory locked and identifiable: 16 bytes available
for secure, random factory Electronic Serial
Number; verifiable as factory locked through
autoselect function.
— Customer lockable: One-time programmable only.
Once locked, data cannot be changed
Zero Power Operation
— Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero.
Compatible with JEDEC standards
— Pinout and software compatible with single-power-
supply flash standard
Performance Characteristics
High performance
— Access time as fast as 55 ns
— Program time: 4 s/word typical using accelerated
programming function
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
Cycling Endurance: 1 million cycles per sector
typical
Data Retention: 20 years typical
Software Features
Supports Common Flash Memory Interface (CFI)
Erase Suspend/Erase Resume
— Suspends erase operations to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation.
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
Hardware Features
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
cycle completion
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state
machine to the read mode
WP#/ACC input pin
— Write protect (WP#) function protects sectors 0, 1,
140, and 141, regardless of sector protect status
— Acceleration (ACC) function accelerates program
timing
Sector protection
— Hardware method to prevent any program or erase
operation within a sector
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
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相关代理商/技术参数 |
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| S71KL512SC0BHV000 | 功能描述:IC 512MB FLASH 64MB DRAM 24FBGA 制造商:cypress semiconductor corp 系列:HyperFlash? + HyperRAM? KL 包装:托盘 零件状态:在售 格式 - 存储器:多芯（FLASH/RAM） 存储器类型:FLASH + DRAM 存储容量:512Mbit Flash, 64Mbit RAM 速度:100MHz 接口:并联，串行 电压 - 电源:2.7 V ~ 3.6 V 工作温度:-40°C ~ 105°C（TA） 封装/外壳:24-VBGA 供应商器件封装:24-FBGA（6x8） 标准包装:338 |
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