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参数资料
| 型号： | S71JL064H80BFI122 |
| 厂商： | ADVANCED MICRO DEVICES INC |
| 元件分类： | 存储器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA73 |
| 封装： | 11.60 X 8 MM, FBGA-73 |
| 文件页数： | 33/95页 |
| 文件大小： | 2244K |
| 代理商： | S71JL064H80BFI122 |
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February 25, 2004 S71JLxxxHxx_00A1
S29JL064H
39
Pre l i m i n a r y
DMS (Data Management Software) allows systems to easily take advantage
of the advanced architecture of the simultaneous read/write product line by al-
lowing removal of EEPROM devices. DMS will also allow the system software to
be simplified, as it will perform all functions necessary to modify data in file struc-
tures, as opposed to single-byte modifications. To write or update a particular
piece of data (a phone number or configuration data, for example), the user only
needs to state which piece of data is to be updated, and where the updated data
is located in the system. This is an advantage compared to systems where user-
written software must keep track of the old data location, status, logical to phys-
ical translation of the data onto the Flash memory device (or memory devices),
and more. Using DMS, user-written software does not need to interface with the
Flash memory directly. Instead, the user's software accesses the Flash memory
by calling one of only six functions.
The device offers complete compatibility with the JEDEC 42.4 sin-
gle-power-supply Flash command set standard. Commands are written to
the command register using standard microprocessor write timings. Reading data
out of the device is similar to reading from other Flash or EPROM devices.
The host system can detect whether a program or erase operation is complete by
using the device status bits: RY/BY# pin, DQ7 (Data# Polling) and DQ6/DQ2
(toggle bits). After a program or erase cycle has been completed, the device au-
tomatically returns to the read mode.
The sector erase architecture allows memory sectors to be erased and repro-
grammed without affecting the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low VCC detector that automat-
ically inhibits write operations during power transitions. The hardware sector
protection feature disables both program and erase operations in any combina-
tion of the sectors of memory. This can be achieved in-system or via
programming equipment.
The device offers two power-saving features. When addresses have been stable
for a specified amount of time, the device enters the automatic sleep mode.
The system can also place the device into the standby mode. Power consump-
tion is greatly reduced in both modes.
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相关代理商/技术参数 |
参数描述 |
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| S71KL512SC0BHV000 | 功能描述:IC 512MB FLASH 64MB DRAM 24FBGA 制造商:cypress semiconductor corp 系列:HyperFlash? + HyperRAM? KL 包装:托盘 零件状态:在售 格式 - 存储器:多芯（FLASH/RAM） 存储器类型:FLASH + DRAM 存储容量:512Mbit Flash, 64Mbit RAM 速度:100MHz 接口:并联，串行 电压 - 电源:2.7 V ~ 3.6 V 工作温度:-40°C ~ 105°C（TA） 封装/外壳:24-VBGA 供应商器件封装:24-FBGA（6x8） 标准包装:338 |
| S71NS032J80 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71NS032J80BJWRA | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71NS032JA0 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71NS032JA0BJWRT | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
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