参数资料
型号: S71JL064H80BFI122
厂商: ADVANCED MICRO DEVICES INC
元件分类: 存储器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA73
封装: 11.60 X 8 MM, FBGA-73
文件页数: 76/95页
文件大小: 2244K
代理商: S71JL064H80BFI122
78
S29JL064H
S71JLxxxHxx_00A1 February 25, 2004
Pr el i m i n ary
Hardware Reset (RESET#)
Note: Not 100% tested.
Word/Byte Configuration (BYTE#)
Parameter
Description
All Speed Options
Unit
JEDEC
Std
tReady
RESET# Pin Low (During Embedded Algorithms)
to Read Mode (See Note)
Max
20
s
tReady
RESET# Pin Low (NOT During Embedded
Algorithms) to Read Mode (See Note)
Max
500
ns
tRP
RESET# Pulse Width
Min
500
ns
tRH
Reset High Time Before Read (See Note)
Min
50
ns
tRPD
RESET# Low to Standby Mode
Min
20
s
tRB
RY/BY# Recovery Time
Min
0
ns
Figure 15. Reset Timings
Parameter
Speed Options
JEDEC
Std.
Description
55
70
85
Unit
tELFL/tELFH
CE# to BYTE# Switching Low or High
Max
5
ns
tFLQZ
BYTE# Switching Low to Output HIGH Z
Max
16
ns
tFHQV
BYTE# Switching High to Output Active
Min
55
70
85
ns
RESET#
RY/BY#
tRP
tReady
R
eset T imings NOT during E mbedded Algorithms
tReady
CE#f, OE#
tRH
CE#f, OE#
R
eset T imings during E mbedded Algorithms
RESET#
tRP
tRB
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