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| 型号： | S71JL064H80BFI122 |
| 厂商： | ADVANCED MICRO DEVICES INC |
| 元件分类： | 存储器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA73 |
| 封装： | 11.60 X 8 MM, FBGA-73 |
| 文件页数： | 87/95页 |
| 文件大小： | 2244K |
| 代理商： | S71JL064H80BFI122 |
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88
S29JL064H
S71JLxxxHxx_00A1 February 25, 2004
Pr el i m i n ary
Erase And Programming Performance
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V VCC, 100,000 cycles; checkerboard
data pattern.
2. Under worst case conditions of 90°C, VCC = 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most
bytes program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program
command. See Table 11 for further information on command definitions.
6. The device has a minimum cycling endurance of 100,000 cycles per sector.
7. Contact the local sales office for minimum cycling endurance values in specific applications and operating conditions.
Latchup Characteristics
Note: Includes all pins except VCC. Test conditions: VCC = 3.0 V, one pin at a time.
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
0.4
5
sec
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
56
sec
Word Program Time
7
210
s
Excludes system level
overhead (Note 5)
Accelerated Byte/Word Program Time
4
120
s
Accelerated Chip Programming Time
10
30
sec
Byte Program Time
5
150
s
Chip Program Time
Byte Mode
42
126
sec
Word Mode
28
84
Description
Min
Max
Input voltage with respect to VSS on all pins except I/O pins
(including OE# and RESET#)
–1.0 V
12.5 V
Input voltage with respect to VSS on all I/O pins
–1.0 V
VCC + 1.0 V
VCC Current
–100 mA
+100 mA
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