参数资料
型号: AD9992BBCZ
厂商: Analog Devices Inc
文件页数: 30/92页
文件大小: 0K
描述: IC CCD SGNL PROC 12BIT 105CSPBGA
产品变化通告: AD9992 Discontinuation 22/Feb/2012
标准包装: 1
类型: CCD 信号处理器,12 位
输入类型: 逻辑
输出类型: 逻辑
接口: 3 线串口
电流 - 电源: 27mA
安装类型: 表面贴装
封装/外壳: 105-LFBGA,CSPBGA
供应商设备封装: 105-CSPBGA(8x8)
包装: 托盘
AD9992
Rev. C | Page 36 of 92
Vertical Masking Using FREEZE/RESUME Registers
As shown in Figure 43 and Figure 44, the FREEZE/RESUME
registers are used to temporarily mask the V-outputs. The pixel
locations to begin the masking (FREEZE) and end the masking
(RESUME) create an area in which the vertical toggle positions
are ignored. At the pixel location specified in the FREEZE register,
the V-outputs are held static at their current dc state, high or low.
The V-outputs are held until the pixel location that is specified
by the RESUME register is reached, at which point the signals
continue with any remaining toggle positions, if any exist.
Four sets of FREEZE/RESUME registers are provided, allowing the
vertical outputs to be interrupted up to four times in the same line.
The FREEZE and RESUME Position 1 to Position 4 are enabled
independently and applied to all groups (Group A, Group B, Group
C, and Group D) using the VMASK_EN register.
Note that when masking is enabled, Group A, Group B, Group C,
and Group D use the same FREEZE/RESUME positions.
Note that the FREEZE/RESUME registers are also used as the
VALTSEL0 and VALTSEL1 registers during special vertical
alternation mode.
XV1
XV24
HD
NO MASKING AREA
05
89
1-
0
43
Figure 43. No FREEZE/RESUME
XV1
XV24
HD
V-MASKING AREA
FREEZE
RESUME
NOTES
1. ALL TOGGLE POSITIONS WITHIN THE FREEZE/RESUME MASKING AREA ARE IGNORED. H-COUNTER CONTINUES TO COUNT DURING MASKING.
2. FOUR SEPARATE MASKING AREAS ARE AVAILABLE, USING FREEZE1/RESUME1, FREEZE2/RESUME2, FREEZE3/RESUME3, AND
FREEZE4/RESUME4 REGISTERS.
05
89
1-
04
4
Figure 44. Using FREEZE/RESUME
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