参数资料
| 型号： | COREFIR-RM |
| 厂商： | Microsemi SoC |
| 文件页数： | 24/67页 |
| 文件大小： | 0K |
| 描述： | IP MODULE COREFIR |
| 标准包装： | 1 |
| 系列： | * |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页当前第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页
Folded Filter
Folded Filter Description
The folded (semi-parallel) single rate CoreFIR type implements the general FIR filter EQ 1 on page 5 . The
folded filter utilizes a minimal number of MAC blocks that are sufficient to keep up with an average input
sample rate. CoreFIR automatically generates the semi-parallel filter type, if the FPGA clock frequency is at
least two times bigger than the input sample frequency. Figure 3 on page 9 shows the simplified block
diagram of the folded filter.
If the clock to sample rate ratio is equal or more than the number N of filter coefficients, the folded filter
utilizes a single MAC block.
Folded Filter Interface
Parameters or Generics
Folded CoreFIR RTL has parameters (Verilog) or generics (VHDL), described in Table 8 . All the parameters
and generics are positive integer types. The table shows a superset of the parameters used by all FIR filter
types while indicating which parameters the folded type utilizes.
Table 8 · Semi-Parallel CoreFIR Parameter or Generic Descriptions
Parameter Name
Valid
Default
Description
Range
CFG_ARCH
1-4
1
Filter type:
1: Fully Enumerated
2: Folded
3: Polyphase Interpolator
4 : Polyphase Decimator
TAPS
COEF_TYPE
2-1024
0-1
16
0
Number of taps
0: Constant coefficients (including multiple coefficient sets).
1: Reloadable coefficients.
COEF_SETS
1-16
1
1: Single coefficient set.
2-16: Multiple coefficient sets.
Valid when constant coefficient type is selected (COEF_TYPE==0).
COEF_SYMM
COEF_UNSIGN
0-2
0-1
0
0
Folded filter does not use the parameter.
0: Signed coefficients.
1: Unsigned coefficients.
COEF_WIDTH
2-18
12
Coefficient bit width. Signed coefficient width ranges from 2 to 18 bits;
unsigned from 2 to 17 bits.
DATA_UNSIGN
0-1
0
0: Signed input data.
1: Unsigned input data.
DATA_WIDTH
2-18
12
Data bit width. Signed data width ranges from 2 to 18 bits; unsigned from
2 to 17 bits.
SYSTOLIC
VALID_O
CoreFIR v8.5 Handbook
0-1
0-1
0
1
Folded filter does not use the parameter.
Folded filter does not use the parameter.
25
相关PDF资料 |
PDF描述 |
|---|---|
| COREPCIF-RM | IP MODULE COREPCIF |
| COREU1LL-AR | IP MODULE COREU1LL |
| COREU1PHY-AR | IP MODULE COREU1PHY |
| CORR-8BIT-XM-UT2 | SITE LICENSE IP CORRELATOR XP |
| CP2-GSA-L | CONN SHIELD LOWER TYPE A 22 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| COREFIR-UR | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CoreFIR Finite Impulse Response (FIR) Filter Generator |
| COREFIR-XX | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CoreFIR Finite Impulse Response (FIR) Filter Generator |
| COREMP7 | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CoreMP7 |
| COREPCI-AN | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CorePCI v5.41 |
| COREPCI-AR | 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CorePCI v5.41 |
发布紧急采购，3分钟左右您将得到回复。