参数资料
型号: COREFIR-RM
厂商: Microsemi SoC
文件页数: 46/67页
文件大小: 0K
描述: IP MODULE COREFIR
标准包装: 1
系列: *

Polyphase Decimation Filter
Description
The primary reason for using Polyphase decimation is to decrease the sampling rate at the output so that
another system operating at a lower sampling rate can use the filtered signal. Another reason is reducing the
processing cost. In any case, the decimation filter performs low-pass filtering and down sampling.
Interface
Parameters or Generics
Decimation CoreFIR RTL has parameters (Verilog) or generics (VHDL), which are described in Table 13 . All
parameters and generics are positive integer types. The table shows the superset of the parameters used by
all FIR filter types, while indicating which parameters the Polyphase Decimation type does not utilize.
Table 13 · Semi-Parallel CoreFIR Parameter or Generic Descriptions
Parameter Name
Valid
Default
Description
Range
CFG_ARCH
1-4
1
Filter type:
1: Fully Enumerated
2: Folded
3: Polyphase Interpolator
4: Polyphase Decimator
TAPS
COEF_TYPE
2-1024
0-1
16
0
Number of taps.
0: Constant coefficients (including multiple coefficient sets).
1: Reloadable coefficients.
COEF_SETS
1-16
1
1: Single coefficient set.
2-16 : Multiple coefficient sets.
Valid when constant coefficient type is selected (COEF_TYPE==0).
COEF_SYMM
0-2
0
0: Not symmetric coefficients.
1: Symmetric coefficients.
2: Anti-symmetric coefficients.
COEF_UNSIGN
0-1
0
0: Signed coefficients.
1: Unsigned coefficients.
COEF_WIDTH
2-18
12
Coefficient bit width. Signed coefficient width ranges from 2 to 18 bits;
unsigned from 2 to 17 bits.
DATA_UNSIGN
0-1
0
0: Signed input data.
1: Unsigned input data.
DATA_WIDTH
2-18
12
Data bit width. Signed data width ranges from 2 to 18 bits; unsigned from 2
to 17 bits.
SYSTOLIC
VALID_O
INP_REG
CoreFIR v8.5 Handbook
0-1
0-1
0-1
0
1
1
Decimation filter does not use the parameter.
Decimation filter does not use the parameter.
Decimation filter does not use the parameter.
47
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