参数资料
型号: DS3112+W
厂商: Maxim Integrated Products
文件页数: 58/133页
文件大小: 0K
描述: IC MUX T3/E3 3.3V 256-PBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 40
控制器类型: 调帧器,多路复用器
接口: 并行/串行
电源电压: 3.135 V ~ 3.465 V
电流 - 电源: 150mA
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 256-LBGA
供应商设备封装: 256-PBGA(27x27)
包装: 管件
DS3112
30 of 133
Signal Name:
T3E3MS
Signal Description:
T3/E3 Mode Select Input
Signal Type:
Input
This signal determines whether the DS3112 will operate in either the T3 mode or the E3 mode. It acts as a
global control bit for the entire DS3112. This signal should be set into the proper state before a hardware
reset is issued via the
RST signal. This input is coupled with the G.747E input to create a special test
mode whereby all the outputs are tri-stated (Table 2-3).
0 = T3 Mode
1 = E3 Mode
Signal Name:
G.747E
Signal Description:
G.747 Mode Enable Input
Signal Type:
Input
This signal determines whether the DS3112 will operate in either the T3 mode or the G.747 mode. It acts
as a global control bit for the entire DS3112. This signal should be set into the proper state before a
hardware reset is issued via the
RST signal. This input is coupled with the T3E3MS input to create a
special test mode whereby all the outputs are tri-stated (Table 2-3).
0 = T3 Mode
1 = G.747 Mode
Table 2-3. Mode Select Decode
T3E3MS
G.747E
MODE SELECTED
0
T3 or M13 Operation
0
1
G.747 Operation
1
0
E3 or E13 Operation
1
Special Test Mode that tri-states all outputs.
JTRST must be driven
low for tri-state operation without power-up. Refer to note for
JTRST signal.
Signal Name:
TEST
Signal Description:
Factory Test Input
Signal Type:
Input (with internal 10k
pullup)
This input should be left open circuited by the user.
Signal Name:
VSS
Signal Description:
Digital Ground Reference
Signal Type:
N/A
All VSS signals should be tied together.
Signal Name:
VDD
Signal Description:
Digital Positive Supply
Signal Type:
N/A
3.3V (
±5%). All V
DD signals should be tied together.
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