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参数资料
| 型号： | MT48LC1M16A1S |
| 厂商： | Micron Technology, Inc. |
| 英文描述： | SYNCHRONOUS DRAM |
| 中文描述： | 同步DRAM |
| 文件页数： | 2/51页 |
| 文件大小： | 1480K |
| 代理商： | MT48LC1M16A1S |
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16Mb: x16 SDRAM
16MSDRAMx16.p65
–
Rev. 8/99
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1999, Micron Technology, Inc.
2
16Mb: x16
SDRAM
GENERAL DESCRIPTION (continued)
locations in a programmed sequence. Accesses begin
with the registration of an ACTIVE command, which
is then followed by a READ or WRITE command. The
address bits registered coincident with the ACTIVE
command are used to select the bank and row to be
accessed (BA selects the bank, A0-A10 select the row).
The address bits registered coincident with the READ or
WRITE command are used to select the starting col-
umn location for the burst access.
The SDRAM provides for programmable READ or
WRITE burst lengths of 1, 2, 4 or 8 locations, or the full
page, with a burst terminate option. An AUTO
PRECHARGE function may be enabled to provide a
self-timed row precharge that is initiated at the end of
the burst sequence.
The 1 Meg x 16 SDRAM uses an internal pipelined
architecture to achieve high-speed operation. This ar-
chitecture is compatible with the 2
n
rule of prefetch
architectures, but it also allows the column address to
be changed on every clock cycle to achieve a high-
speed, fully random access. Precharging one bank while
accessing the alternate bank will hide the PRECHARGE
cycles and provide seamless, high-speed, random-ac-
cess operation.
The 1 Meg x 16 SDRAM is designed to operate in
3.3V, low-power memory systems. An auto refresh
mode is provided, along with a power-saving, power-
down mode. All inputs and outputs are LVTTL-com-
patible.
SDRAMs offer substantial advances in DRAM oper-
ating performance, including the ability to synchro-
nously burst data at a high data rate with automatic
column-address generation, the ability to interleave
between internal banks in order to hide precharge time,
and the capability to randomly change column ad-
dresses on each clock cycle during a burst access.
相关PDF资料 |
PDF描述 |
|---|---|
| MT48LC2M32LFFC | 512K x 32 x 4 banks 3.3v SDRAM(3.3V,512K x 32 x 4组同步动态RAM) |
| MT48LC4M16A2 | SYNCHRONOUS DRAM |
| MT48LC16M4A2 | RSD Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 24V; Output Voltage (Vdc): 3.3V; Power: 1W; 1kVDC and 3kVDC Isolation Options; Approved for Medical Applications; Suitable for Automated Assembly; 8, 10 and 12 pin Pinning Style Options; Optional Continuous Short Circuit Protected; Efficiency to 85% |
| MT48LC8M16A2 | SYNCHRONOUS DRAM |
| MT48V2M32LFFC | 512K x 32 x 4 banks 2.5V SDRAM(2.5V,512K x 32 x 4组同步动态RAM) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MT48LC1M16A1-TG | 制造商:Micron Technology Inc 功能描述: |
| MT48LC1M16A1TG6SE | 制造商:MICRON 功能描述:New |
| MT48LC1M16A1TG-6SE | 制造商:Micron Technology Inc 功能描述:IC,SDRAM,2X512KX16,CMOS,TSOP,50PIN,PLASTIC |
| MT48LC1M16A1TG-7S | 制造商:Mitel Networks Corporation 功能描述:SDRAM, 1M x 16, 50 Pin, Plastic, TSOP |
| MT48LC1M16A1TG-7SE | 制造商:Micron Technology Inc 功能描述:SDRAM, 1M x 16, 50 Pin, Plastic, TSOP |
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