R8C/36T-A Group
21. Clock Synchronous Serial Interface
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0240EJ0010 Rev.0.10
Page 464 of 728
Aug 05, 2011
21.2.6.2
I2C bus Function
Notes:
1. All SFRs except the shift register, bits SCLO and SDAO, and bits BC0 to BC3 in the SIMR1 register.
2. When rewriting the SDAO bit, write 0 to the SDAOP bit simultaneously using the MOV instruction.
3. For the data output after serial data transmission, the last bit value of the transmitted serial data is retained. If the
content of the SDAO bit is rewritten before or after serial data transmission, the change is immediately reflected
in the data output until transmission starts. Do not write to the SDAO bit during transfer operation.
4. Enabled in master mode with the I2C bus function. When writing to the BBSY bit, write 0 to the SCP bit
simultaneously using the MOV instruction. Execute the same way when a start condition is regenerated.
5. Disabled in clock synchronous serial mode.
6. When 0 is written to the ICE bit in the SICR1 register or 1 is written to the SIRST bit in the SICR2 register while
the I2C bus function is operating, the values of the BBSY bit in the SICR2 register and the STOP bit in the SISR
. This can be used to prevent the values of bits BBSY and STOP from becoming undefined. When the
control block is reset in SSU bus interface mode and clock synchronous serial mode, set TE_NAKIE and
RE_STIE after the control block is reset.
Even if a start condition is generated by writing 0 to the SDAO bit, the state does not change the transfer
enabled state. Only generation of a start condition by writing 1 to the BBSY bit is enabled.
Since the SCL signal is held low, no stop condition can be generated by writing 1 to the SDAO bit. Generate a
stop condition by writing 0 to the BBSY bit.
Address 000E7h (SICR2_0)
Bit
b7b6
b5b4b3
b2b1b0
Symbol
After Reset
0
111
1101
Bit
Symbol
Bit Name
Function
R/W
b0
—
Nothing is assigned. The write value must be 1. The read value is 1.
—
b1
SIRST
Control block reset bit
When a hang-up occurs due to communication
failure during operation, writing 1 initializes the
control block without setting ports or resetting
R/W
b2
—
Nothing is assigned. The write value must be 1. The read value is 1.
—
b3
SCLO
SCL monitor flag
0: SCL pin is set to low
1: SCL pin is set to high
R
b4
SDAOP
SDAO write protect bit
(2)When rewriting the SDAO bit, write 0 to this bit
simultaneously. The read value is 1.
R/W
b5
SDAO
Serial data output value control bit
The serial data output can be monitored by reading
this bit:
0: Serial data output is low
1: Serial data output is high
0: Serial data output is set to low
1: Serial data output is set to high
R/W
b6
SCP
Start/stop condition generation
When writing to the BBSY bit, write 0 to this bit
simultaneously. The read value is 1. Writing 1 has
no effect.
R/W
b7
BBSY
When read:
0: Bus is released (SDA signal changes from low to
high while SCL signal is held high)
1: Bus is occupied (SDA signal changes from high
to low while SCL signal is held high)
When written:
0: Stop condition generated
1: Start condition generated
R/W