参数资料
型号: RK80546KG0802MM
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 64-BIT, 3000 MHz, MICROPROCESSOR, CPGA604
封装: FLIP CHIP, MICRO PGA-604
文件页数: 10/106页
文件大小: 4724K
代理商: RK80546KG0802MM
Datasheet
11
1
Introduction
This document details specifications and features of the 64-bit Intel Xeon processor with 2 MB
L2 cache, including new processors in LV (55 W TDP) and MV (90 W TDP) configurations. In this
document, “processor” and “64-bit Intel Xeon processor with 2 MB L2 cache” are generic terms
for all of these processors. Details specific to a particular processor will be specifically called out in
the applicable text, table or figure.
The 64-bit Intel Xeon processor with 2 MB L2 cache, 64-bit Intel Xeon LV 3 GHz
processor and 64-bit Intel Xeon MV 3.20 GHz processor are server / workstation processors
based on improvements to the Intel NetBurst microarchitecture. They maintain the tradition of
compatibility with IA-32 software and include features found in the Intel Xeon processor such as
Hyper Pipelined Technology, a Rapid Execution Engine, and an Execution Trace Cache. Hyper
Pipelined Technology includes a multi-stage pipeline, allowing the processor to reach much higher
core frequencies. The 800 MHz system bus is a quad-pumped bus running off a 200 MHz system
clock making 6.4 GB per second data transfer rates possible. The Execution Trace Cache is a level
1 cache that stores decoded micro-operations, which removes the decoder from the main execution
path, thereby increasing performance.
In addition, enhanced thermal and power management capabilities are implemented including
Thermal Monitor and Thermal Monitor 2. These capabilities are targeted for dual processor (DP)
servers and workstations in data center and office environments. Thermal Monitor and Thermal
Monitor 2 provide efficient and effective cooling in high temperature situations. Demand Based
Switching (DBS) with Enhanced Intel SpeedStep allows trade-offs to be made between
performance and power consumption. This may lower average power consumption (in conjunction
with OS support). [Note: Not all processors are capable of supporting Thermal Monitor 2 or
Enhanced Intel SpeedStep technology. More details on which processor frequencies support this
feature are provided in the 64-bit Intel Xeon Processor with 800 MHz System Bus (1 MB and 2
MB L2 Cache Versions) Specification Update.
The 64-bit Intel Xeon processor with 2 MB L2 cache supports Hyper-Threading Technology. This
feature allows a single, physical processor to function as two logical processors. While some
execution resources such as caches, execution units, and buses are shared, each logical processor
has its own architecture state with its own set of general-purpose registers, control registers to
provide increased system responsiveness in multitasking environments, and headroom for next
generation multithreaded applications. More information on Hyper-Threading Technology can be
found at http://www.intel.com/technology/hyperthread.
The 64-bit Intel Xeon processor with 2 MB L2 cache also includes the Execute Disable Bit
capability previously available in Intel Itanium processors. This feature, when combined with a
supported operating system, allows memory to be marked as executable or non-executable. If code
attempts to run in non-executable memory, the processor raises an error to the operating system.
This feature can prevent some classes of viruses or worms that exploit buffer overrun
vulnerabilities and can thus help improve the overall security of the system. See the Intel
Architecture Software Developer’s Manual for more detailed information.
Other features within the Intel NetBurst microarchitecture include Advanced Dynamic Execution,
Advanced Transfer Cache, enhanced floating point and multi-media unit, Streaming SIMD
Extensions 2 (SSE2) and Streaming SIMD Extensions 3 (SSE3). Advanced Dynamic Execution
improves speculative execution and branch prediction internal to the processor. The Advanced
Transfer Cache is a 2 MB, on-die, level 2 (L2) cache with increased bandwidth. The floating point
and multi-media units include 128-bit wide registers and a separate register for data movement.
Streaming SIMD2 (SSE2) instructions provide highly efficient double-precision floating point,
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