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参数资料
| 型号： | RK80546KG0802MM |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, 3000 MHz, MICROPROCESSOR, CPGA604 |
| 封装： | FLIP CHIP, MICRO PGA-604 |
| 文件页数： | 95/106页 |
| 文件大小： | 4724K |
| 代理商： | RK80546KG0802MM |
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Datasheet
89
Features
Snoop events that occur while in Sleep state or during a transition into or out of Sleep state will
cause unpredictable behavior.
In the Sleep state, the processor is incapable of responding to snoop transactions or latching
interrupt signals. No transitions or assertions of signals (with the exception of SLP# or RESET#)
are allowed on the front side bus while the processor is in Sleep state. Any transition on an input
signal before the processor has returned to Stop Grant state will result in unpredictable behavior.
If RESET# is driven active while the processor is in the Sleep state, and held active as specified in
the RESET# pin specification, then the processor will reset itself, ignoring the transition through
Stop Grant state. If RESET# is driven active while the processor is in the Sleep state, the SLP# and
STPCLK# signals should be deasserted immediately after RESET# is asserted to ensure the
processor correctly executes the reset sequence.
When the processor is in Sleep state, it will not respond to interrupts or snoop transactions.
7.3
Demand Based Switching (DBS) with Enhanced
Intel SpeedStep Technology
Demand Based Switching (DBS) with Enhanced Intel SpeedStep technology enables the
processor to switch between multiple frequency and voltage points, which may result in platform
power savings. In order to support this technology, the system must support dynamic VID
transitions. Switching between voltage / frequency states is software controlled.
Note: Not all processors are capable of supporting Enhanced Intel SpeedStep technology. More
details on which processor frequencies support this feature are provided in the 64-bit Intel Xeon
Processor with 800 MHz System Bus (1 MB and 2 MB L2 Cache Versions) Specification Update.
Enhanced Intel SpeedStep technology is a technology that creates processor performance states (P-
states). P-states are power consumption and capability states within the Normal state. Enhanced
Intel SpeedStep technology enables real-time dynamic switching between frequency and voltage
points. It alters the performance of the processor by changing the bus to core frequency ratio and
voltage. This allows the processor to run at different core frequencies and voltages to best serve the
performance and power requirements of the processor and system. Note that the front side bus is
not altered; only the internal core frequency is changed. In order to run at reduced power
consumption, the voltage is altered in step with the bus ratio.
The following are key features of Enhanced Intel SpeedStep technology:
1. Multiple voltage / frequency operating points provide optimal performance at reduced power
consumption.
2. Voltage / Frequency selection is software controlled by writing to processor MSR’s (Model
Specific Registers), thus eliminating chipset dependency.
If the target frequency is higher than the current frequency, VCC is incremented in steps (+12.5
mV) by placing a new value on the VID signals. The Phase Lock Loop (PLL) then locks to the new
frequency. Note that the top frequency for the processor can not be exceeded.
If the target frequency is lower than the current frequency, the PLL locks to the new frequency. The
VCC is then decremented in step (-12.5 mV) by changing the target VID through the VID signals.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RK80546KG0802MMS L7ZF | 制造商:Intel 功能描述:MPU Xeon NetBurst 64-Bit 90nm 3GHz 604-Pin FCmPGA4 制造商:Intel 功能描述:XEON 3E GHZ,2M,800MHZ,FC MPGA4 - Trays |
| RK80546KG0881M S L7PF | 制造商:Intel 功能描述:INTEL XEON, 3.2DGHZ,1M,800MHZ,FC-MPGA4 - Trays |
| RK80546KG0882MMS L7ZE | 制造商:Intel 功能描述:XEON 3.2,2M,800MHZ,FC-MPGA4 - Trays |
| RK80546KG1041M | 制造商:Rochester Electronics LLC 功能描述:XEON 3.6GHZ,1M,800MHZ,FC MPGA4 - Bulk |
| RK80546KG1041M S L7PH | 制造商:Intel 功能描述:MPU Xeon 制造商:Intel 功能描述:MPU XEON 90NM 3.6GHZ 604PIN PGA - Trays |
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