参数资料
型号: ZL50114GAG2
厂商: XILINX INC
元件分类: 通信及网络
英文描述: SPECIALTY TELECOM CIRCUIT, PBGA552
封装: 35 X 35 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, MS-034, BGA-552
文件页数: 29/113页
文件大小: 2004K
代理商: ZL50114GAG2
ZL50110/11/12/14
Data Sheet
22
Zarlink Semiconductor Inc.
U6
SYSTEM_CLK
U9
VDD_IO
U18
VDD_IO
U21
M0_GTX_CLK
U22
M0_RXD[2]
U23
M0_RXD[5]
U24
M0_TXCLK
U25
M0_CRS
U26
M1_RBC0
V1
PLL_SEC
V2
RAM_BW_D
V3
RAM_BW_F
V4
SYSTEM_RST
V5
GPIO[2]
V6
VDD_CORE
V9
VDD_IO
V10
VDD_IO
V11
VDD_IO
V12
VDD_IO
V13
VDD_IO
V14
VDD_IO
V15
VDD_IO
V16
VDD_IO
V17
VDD_IO
V18
VDD_IO
V21
M0_TXD[7]
V22
M0_TXER
V23
M0_TXEN
V24
M0_RXD[4]
V25
M0_RXDV
V26
M0_RXER
W1
RAM_BW_E
W2
RAM_BW_G
W3
GPIO[0]
W4
GPIO[3]
W5
GPIO[9]
W6
RAM_DATA[33]
W21
M0_TXD[2]
Ball
Number
Signal Name
W22
M0_TXD[5]
W23
M0_TXD[6]
W24
M0_RXD[6]
W25
M0_RXD[7]
W26
M0_RXD[3]
Y1
RAM_BW_H
Y2
GPIO[4]
Y3
GPIO[6]
Y4
GPIO[10]
Y5
RAM_DATA[32]
Y6
VDD_CORE
Y21
VDD_CORE
Y22
M0_TXD[1]
Y23
M0_TXD[4]
Y24
M0_RBC0
Y25
M0_COL
Y26
M0_RXD[1]
AA1
GPIO[1]
AA2
GPIO[7]
AA3
GPIO[8]
AA4
GPIO[15]
AA5
RAM_DATA[39]
AA6
GND
AA7
RAM_DATA[45]
AA8
RAM_DATA[52]
AA9
VDD_CORE
AA10
JTAG_TMS
AA11
CPU_ADDR[2]
AA12
CPU_ADDR[12]
AA13
VDD_CORE
AA14
VDD_CORE
AA15
CPU_DATA[8]
AA16
CPU_DATA[15]
AA17
CPU_DATA[23]
AA18
VDD_CORE
AA19
M2_RXCLK
AA20
M2_RXDV
AA21
GND
Ball
Number
Signal Name
AA22
M0_TXD[0]
AA23
M0_TXD[3]
AA24
M0_REFCLK
AA25
M0_RBC1
AA26
M0_RXD[0]
AB1
GPIO[5]
AB2
GPIO[11]
AB3
GPIO[14]
AB4
RAM_DATA[38]
AB5
RAM_DATA[43]
AB6
RAM_DATA[44]
AB7
RAM_DATA[51]
AB8
RAM_DATA[60]
AB9
TEST_MODE[1]
AB10
GND
AB11
CPU_ADDR[6]
AB12
CPU_ADDR[14]
AB13
CPU_ADDR[23]
AB14
CPU_TA
AB15
CPU_DATA[1]
AB16
CPU_DATA[7]
AB17
CPU_DATA[12]
AB18
CPU_DATA[22]
AB19
CPU_DATA[30]
AB20
M2_TXER
AB21
M2_RXD[1]
AB22
M0_RXCLK
AB23
M0_LINKUP_LED
AB24
M2_ACTIVE_LED
AB25
M1_ACTIVE_LED
AB26*
M3_ACTIVE_LED
AC1
GPIO[12]
AC2
GPIO[13]
AC3
RAM_DATA[37]
AC4
RAM_DATA[42]
AC5
RAM_DATA[46]
AC6
RAM_DATA[49]
AC7
RAM_DATA[59]
Ball
Number
Signal Name
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