参数资料
型号: ZL50114GAG2
厂商: XILINX INC
元件分类: 通信及网络
英文描述: SPECIALTY TELECOM CIRCUIT, PBGA552
封装: 35 X 35 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, MS-034, BGA-552
文件页数: 94/113页
文件大小: 2004K
代理商: ZL50114GAG2
ZL50110/11/12/14
Data Sheet
81
Zarlink Semiconductor Inc.
10.0
DC Characteristics
* Exceeding these figures may cause permanent damage. Functional operation under these conditions is not guaranteed. Voltage
measurements are with respect to ground (VSS) unless otherwise stated.
* The core and PLL supply voltages must never be allowed to exceed the I/O supply voltage by more than 0.5 V during power-up. Failure to
observe this rule could lead to a high-current latch-up state, possibly leading to chip failure, if sufficient cross-supply current is available. To be
safe ensure the I/O supply voltage supply always rises earlier than the core and PLL supply voltages.
Typical figures are at 25
°C and are for design aid only, they are not guaranteed and not subject to production testing. Voltage measurements are
with respect to ground (VSS) unless otherwise stated.
Absolute Maximum Ratings*
Parameter
Symbol
Min.
Max.
Units
I/O Supply Voltage
VDD_IO
-0.5
5.0
V
Core Supply Voltage
VDD_CORE
-0.5
2.5
V
PLL Supply Voltage
VDD_PLL
-0.5
2.5
V
Input Voltage
VI
-0.5
VDD + 0.5
V
Input Voltage (5 V tolerant inputs)
VI_5V
-0.5
7.0
V
Continuous current at digital inputs
IIN
-
±10
mA
Continuous current at digital outputs
IO
-
±15
mA
Package power dissipation
PD
-
3
W
Storage Temperature
TS
-55
+125
°C
Recommended Operating Conditions
Characteristics
Symbol
Min.
Typ.
Max.
Units
Test
Condition
Operating Temperature
TOP
-40
25
+85
°C
Junction temperature
TJ
-40
-
125
°C
Positive Supply Voltage, I/O
VDD_IO
3.0
3.3
3.6
V
Positive Supply Voltage, Core
VDD_CORE
1.65
1.8
1.95
V
Positive Supply Voltage, Core
VDD_PLL
1.65
1.8
1.95
V
Input Voltage Low - all inputs
VIL
--
0.8
V
Input Voltage High
VIH
2.0
-
VDD_IO
V
Input Voltage High, 5V tolerant inputs
VIH_5V
2.0
-
5.5
V
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