参数资料
型号: ZL50114GAG2
厂商: XILINX INC
元件分类: 通信及网络
英文描述: SPECIALTY TELECOM CIRCUIT, PBGA552
封装: 35 X 35 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, MS-034, BGA-552
文件页数: 39/113页
文件大小: 2004K
代理商: ZL50114GAG2
ZL50110/11/12/14
Data Sheet
31
Zarlink Semiconductor Inc.
3.1.5
TDM Signals Common to ZL50110, ZL50111, ZL50112 and ZL50114
Signal
I/O
Package Balls
Description
TDM_CLKi_REF
I D
C3
TDM port reference clock input for
backplane operation
TDM_CLKo_REF
O
E6
TDM port reference clock output for
backplane operation
TDM_FRMi_REF
I D
C2
TDM port reference frame input. For
different standards this pin is given a
different identity:
ST-BUS: TDM_F0i
H.110:
TDM_FRAME
H-MVIP:
TDM_F0
Signal is normally active low, but can be
active high depending on standard.
Indicates the start of a TDM frame by
pulsing every 125 s. Normally will straddle
rising edge or falling edge of clock pulse,
depending on standard and clock frequency.
TDM_FRMo_REF
O
B1
TDM port reference frame output. For
different standards this pin is given a
different identity:
ST-BUS: TDM_F0o
H.110:
TDM_FRAME
H-MVIP:
TDM_F0
Signal is normally active low, but can be
active high depending on standard.
Indicates the start of a TDM frame by
pulsing every 125 s. Normally will straddle
rising edge or falling edge of clock pulse,
depending on standard and clock frequency.
Table 6 - TDM Interface Common Pin Definition
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