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参数资料
| 型号： | ZL50114GAG2 |
| 厂商： | XILINX INC |
| 元件分类： | 通信及网络 |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PBGA552 |
| 封装： | 35 X 35 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, MS-034, BGA-552 |
| 文件页数： | 36/113页 |
| 文件大小： | 2004K |
| 代理商： | ZL50114GAG2 |
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ZL50110/11/12/14
Data Sheet
29
Zarlink Semiconductor Inc.
3.1.3
ZL50110 Variant TDM Stream Connection
Note: Speed modes:
2.048 Mbps - all 8 streams active (bits [7:0]), with 32 channels per stream - 256 total channels.
8.192 Mbps - 2 streams active (bits [1:0]), with 128 channels per stream - 256 total channels.
J2 - 2 streams active (bits [1:0]), with 98 channels per stream - 196 total channels.
Note: All TDM Interface inputs (including data, clock and frame pulse) have internal pull-down resistors so they can be safely left
unconnected if not used.
Signal
I/O
Package Balls
Description
TDM_STi[7:0]
I D
[7]
A8
[6]
A6
[5]
D8
[4]
B5
[3]
C5
[2]
B3
[1]
E9
[0]
D5
TDM port serial data input streams. For
different standards these pins are given
different identities:
ST-BUS: TDM_STi[7:0]
H.110:
TDM_D[7:0]
H-MVIP: TDM_HDS[7:0]
Triggered on rising edge or falling edge
depending on standard. At 8.192 Mbps only
streams [1:0] are used. Streams [1:0] are
used for J2.
TDM_STo[7:0]
OT
[7]
A7
[6]
B7
[5]
A5
[4]
A4
[3]
D7
[2]
F8
[1]
A2
[0]
B2
TDM port serial data output streams. For
different standards these pins are given
different identities:
ST-BUS: TDM_STo[7:0]
H.110:
TDM_D[7:0]
H-MVIP: TDM_HDS[7:0]
Triggered on rising edge or falling edge
depending on standard. At 8.192 Mbps only
streams [1:0] are used. Streams [1:0] are
used for J2.
TDM_CLKi[7:0]
I D
[7]
C8
[6]
C7
[5]
D9
[4]
E10
[3]
B4
[2]
F10
[1]
D6
[0]
E7
TDM port clock inputs
programmable as active high or low. Can
accept frequencies of 1.544 MHz,
2.048 MHz, 4.096 MHz, 8.192 MHz,
6.312 MHz or 16.384 MHz depending on
standard used.
At 8.192 Mbps only
streams [1:0] are used. Streams [1:0] are
used for J2.
TDM_CLKo[7:0]
O
[7]
D10
[6]
B6
[5]
F11
[4]
E8
[3]
A3
[2]
C6
[1]
C4
[0]
F9
TDM port clock outputs. Will generate
1.544 MHz, 2.048 MHz, 4.096 MHz,
6.312 MHz, 8.192 MHz or 16.384 MHz
depending on standard used. At
8.192 Mbps only streams [1:0] are used.
Streams [1:0] are used for J2.
Table 4 - TDM Interface ZL50110 Stream Pin Definition
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL50115 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50115GAG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 324BGA - Trays 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 32CH 324PBGA |
| ZL50115GAG2 | 制造商:Microsemi Corporation 功能描述:PB FREE 1 TDM + 1 ETHERNET - Trays 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 32CH 324PBGA |
| ZL50116 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50116GAG | 制造商:Microsemi Corporation 功能描述:2 TDM + 1 ETHERNET - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 64CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 64CH 324PBGA |
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